Forward DAC results to UART

John,

I really don't have any experience with microcontroller programming. Actually all what I want to do is to forward the conversion output data to my computer through UART to a serial interface.

So could you tell me please exactly which part in the code I have to delete/change?

Thx

Please give me a little more info, schematic, baud rate, input voltage range, readings/sec, theory of operation... as much as you can.

I will measure the voltage drop across a shunt, ranging from 1mV ... 500mV.

I intend to use 16 bit resolution at theSD, but I still don't know how much will be my sampling rate.

The 16 bit result of the SD has to be sent to the computer through UART. Now I don't really know which baud rate I will use, but the highest possible one. Let's say 115200, and if any data gets lost, I will take a lower baud rate. I know how to adjust the bud rate with the control registers.

The voltage, to be converted is applied to channel 2 (A2.0+, A2.0-). The conversion result is stored in SD24MEM2. Now I want to send this data to TXBUF0. And then I will read the sent data in my computer.

You told me I have to split the content of SD24MEM2 because its 16 bit, and TXBUF0 can accept max 1 byte, so how?

MSP430-Beginner said:

You told me I have to split the content of SD24MEM2 because its 16 bit, and TXBUF0 can accept max 1 byte, so how?

You can isolate the values as follows

unsigned char lowbyte;
unsigned char highbyte;
unsigned int result;

result = SD24MEM2;
lowbyte = result & 0xff;
highbyte = result >>8;

Then send them in two steps. Note that I read SD24MEM2 into a variable forst. This ensures that you won't accidentally split two diffeent SD16 results if the result changes just between the two byte-splitting commands.

If your baudrate is high enough so the transmitter is empty when you got the next conversion result (that's how it shoudl be, else you'll have to skip results anyway), the output shift register is empty and so is TXBUF.

So when you write the first byte to TXBUF, it is moved to the output shift register with the next UART clock pulse, and TXBUF is free to receive the second byte. To be sure, you can check UCTXIFG to ensoure that TXBUF is free for the next byte.

Jens-Michael Gross said:

unsigned char lowbyte;
unsigned char highbyte;
unsigned int result;

result = SD24MEM2;
lowbyte = result & 0xff;
highbyte = result >>8;

Thanks a lot for the detailed answer.

Now I'm wondering wich baud rate I have to choose? I set up Baud rate of 115200 and in Hterm I get invalied data... I reduced it to 57600, I'm getting the right data... Now I'm wondering if I'm missing some data, may be the baud rate 57600 is too low...

How can I determine with which rate the data is sent from the ADC to UART? Is the output rate of the ADC equal to its sampling frequency?

In my code, inspired by the example code I selected a Over sampling ratio of 128 (i even don't know which is the most suitable OSR for me :( )

In continuous mode, the output of the SD16 is ewqual to its sampling frequency divided by teh oversampling ratio. There is an additional delay if you use sequence mode and switch input channels.

The UART baudrate jsu tdepends on teh procided clock and the clock baudrate divider written to the UART. If you get invalid data on higher baudrates, maybe the clock is off the assumed frequency, or your formula for calculating the baudrate divider and modulation value is wrong, so it works for some but not for all baudrates.

Jens-Michael Gross said:

In continuous mode, the output of the SD16 is ewqual to its sampling frequency divided by teh oversampling ratio

Do you mean that the sampling frequency is equal to the modulating frequency devided by OSR?  the modulating freuqnecy is selected by SD24SSELx and SD24DIVx. So if  I choose the default OSR, and SMCLK, the output of the SD24 will be: 1,1Mhz/256= 4,29 kHz?

Jens-Michael Gross said:

The UART baudrate jsu tdepends on teh procided clock and the clock baudrate divider written to the UART. If you get invalid data on higher baudrates, maybe the clock is off the assumed frequency, or your formula for calculating the baudrate divider and modulation value is wrong, so it works for some but not for all baudrates.

What do you mean with: "may be the clock is off the assumed frequency"?

No I'm sure I adjusted the right baud rate. You may have a look at my code again, with BR=115200 set.

In case that the data at the output of SD24 is at 4,29 kHz, do I have to set a baud rate which is close to this value? Is it normal, when I choose a higher baud rate, that I get incorrect data?

MSP430-Beginner said:

Do you mean that the sampling frequency is equal to the modulating frequency devided by OSR? 

MSP430-Beginner said:

So if  I choose the default OSR, and SMCLK, the output of the SD24 will be: 1,1Mhz/256= 4,29 kHz?

MSP430-Beginner said:

What do you mean with: "may be the clock is off the assumed frequency"?

If the clock is not much higher than the desired baudrate (so you have a small baudrate divider), it may be that the DCO runs near the expected frequency for one byte and far from it (relative to the required precision) for the next byte or part of it.

As a rule of thumb, the DCO is not a good clock source if the resulting baudrate divider is <16 while the jitter doesn't count anymore when the baudrate divider is >32 (as 32 clock cycles is the length of the DCO modulation sequence)

MSP430-Beginner said:

No I'm sure I adjusted the right baud rate. You may have a look at my code again, with BR=115200 set.

MSP430-Beginner said:

Is it normal, when I choose a higher baud rate, that I get incorrect data?

And you're right, you'll need 115200Bd, since 4,4kHz * 2 Bytes (16 bit result) * 10 bit (8 bit + start + stop bit) is 88kBd, so 57,6kBd wouldn't be fast enough.

Jens-Michael Gross said:

As a rule of thumb, the DCO is not a good clock source if the resulting baudrate divider is <16 while the jitter doesn't count anymore when the baudrate divider is >32 (as 32 clock cycles is the length of the DCO modulation sequence)

I read in the data sheet that MSP430AFE253 has: LFXT1, XT2, DCO and VLO. I think XT2 is the most suitable one for UART in my case (400-kHz to 16-MHz), becuase the others can only be used with low frequencies. Am I right?

Now to select the frequency of XT2CLK, I have to set the XT2Sx bits in the ctr register BCSCTL3. But there it is not possible to slect a fixed freq but a range:

XT2Sx Bits 7-6 XT2 range select. These bits select the frequency range for XT2.
00 0.4- to 1-MHz crystal or resonator
01 1- to 3-MHz crystal or resonator
10 3- to 16-MHz crystal or resonator
11 Digital external 0.4- to 16-MHz clock source

So how can I set a fixed frequency for XT2?

with SELMx bit in BCSCTL2 register, it is possible  to select the MCLK source. I could not find houw to slect the SMCLK source. Because right now in my code, for UART, I'm using SMCLK (U0TCTL |= SSEL1;) . Or XT2can only be used with MCLK?

And thank you so much Sir for all the detailed answers.

MSP430-Beginner said:

the others can only be used with low frequencies

The XT1 can be used for an external low frequency watch crystal (32768Hz) with very low power consumption (LFXT1) or on many but not all MSPs for attaching a HF crystal too. Check the family users guide and the device datasheet for details about the AFE235. XT2 is for attaching an external crystal too. The XT2Sx bits just define the frequency of the attached crystal and therefore the required driving strength for a proper crystal oscilaltion. Without an external crystal, nothing will happen on XT1 or XT2.

Alternatively, both, XT1 and XT2 inputs can be configured for accepting an external digital clock signal (ttl square wave) from an external clock source. Then the crystal driver is deactivated.

MSP430-Beginner said:

So how can I set a fixed frequency for XT2?

MSP430-Beginner said:

I could not find houw to slect the SMCLK source

Thank you for all the details.

In my case I donot have an external crystal, so I have to choose either VLO or DCO. Since I need a baud rate of 115200, I need for UART at least a freq of around 100kHz. Since VLO can only offer a freq of max 12kHz, I have to stay with VLO!

So now, if the unstable frequency of the VLO is the reason of the incorrect received data, is there any alternative that I can I do to solve the problem?

Could you have a short look at my code, may be you can notice sthg else I'm doing wrong.

Thanks!

You can raise the DCO frequency.

Depending on the device, the DCO can produce even higher frequencies than you can directly use. If, say, the DCO runs on 32MHz and you use it with a divider of 4 for MCLK, SMCLK etc, then you'll have 8MHz clock, but every clock pulse is combined of four DCO pulses, so the DCO jitter is reduced. Even more, the jitter caused by the DCO modulation is eliminated after 32 DCO clock cycles (as this is the modulation sequence length), so on 1MHz, there is no more DCO clock jitter at all. Good base for putting this into the USCI baudrate divider.

You don't need to go that high. Just keep the DCO clock at least by a factor of 32 above the baudrate. So 4MHz should be the minimum for 115kBd.