MSP430FR2476:SPI communication issue between MSP430

Part Number: MSP430FR2476

Prepare two MPS430FR2476, each as master/slave
SPI communication (communication with eUSCI_A0) function is under development.

Among them, like [phenomenon], it is a situation where [what you want to do] cannot be realized due to unintended behavior.
Sorry to trouble you, but please answer the following [questions].

【phenomenon】
Immediately after writing data to UCAxTXBUF on the master side, it turn ON not only UCTXIFG but also the "UCRXIFG" bit.
　UCRXIFG turns ON even when the communication cable between slaves is disconnected.

[What you want to do]
　I want to detect a timeout error when there is no received data for a certain period of time on the master side.
　　⇒Currently, the received signal arrives immediately after transmission, so it cannot be detected.

【question】
1. Is the above [phenomenon] normal behavior? If there is an error, is there a workaround?
2. Is it possible to realize [what you want to do]? If so, do you have any sample code?

【detail】
The master/slave performs the following processing.

　Master: Executes the following processes at 1ms intervals.
　　　　　　　　　① Data transmission　　　　　EUSCI_A_SPI_transmitData(EUSCI_A0_BASE, tx_data);
　　　　　　　　　② Wait for BUSY OFF while(EUSCI_A_SPI_isBusy(EUSCI_A0_BASE));
　　　　　　　　　③ Check the reception flag while(!EUSCI_A_SPI_getInterruptStatus(EUSCI_A0_BASE, EUSCI_A_SPI_RECEIVE_INTERRUPT));
　　　　　　　　　　④ Data reception　　　　　　*rx_data = EUSCI_A_SPI_receiveData(EUSCI_A0_BASE);

　Slave: 　Perform the following processing at the UCRXIFG interrupt.
　　　　　　　　　① Data transmission　　　　　EUSCI_A_SPI_transmitData(EUSCI_A0_BASE, tx_data);
　　　　　　　　　② Wait for BUSY OFF     while(EUSCI_A_SPI_isBusy(EUSCI_A0_BASE));
　　　　　　　　　③ Reception flag check    while(!EUSCI_A_SPI_getInterruptStatus(EUSCI_A0_BASE, EUSCI_A_SPI_RECEIVE_INTERRUPT));
　　　　　　　　　④ Data reception　　　　　　　　　　*rx_data = EUSCI_A_SPI_receiveData(EUSCI_A0_BASE);

[Register setting]

Best regards.