Hi.
I was trying to store and retrieve ADXL345 accelerometer data into AT24C256 EEPROM.But when i run the program some garbage values are printing on output. The accelerometer output is not storing into EEPROM.I'm sharing the piece of code please help me.
/////////////////// main.c ///////////////// int main(void) { WDTCTL = WDTPW | WDTHOLD; // stop watchdog timer LPM1_Clock_config(); // I2C pins P7SEL0 |= BIT0 | BIT1; P7SEL1 &= ~(BIT0 | BIT1); PM5CTL0 &= ~LOCKLPM5; // i2c Configuration initI2C(); uart_config(); power_ctrl(); while (1) { int ADXL345_Dev_id, res_data,bw_data,data_format,count; I2C_Master_ReadReg(0x53,0x32,6); X1=((ReceiveBuffer[1]<<8)|ReceiveBuffer[0]); Y1=((ReceiveBuffer[3]<<8)|ReceiveBuffer[2]); Z1=((ReceiveBuffer[5]<<8)|ReceiveBuffer[4]); memset(addr,0,sizeof(addr)); sprintf(addr,"X1=%d,Y1=%d,Z1=%d\r\n",X1,Y1,Z1); count=strlen(addr); // id_print(addr); // if(count<=5) //{ I2C_Master_WriteReg(0x50,0x00,addr,count); //count++; //} __delay_cycles(8000000); I2C_Master_ReadReg(0x50,0x00,count); for(i=0;i<=count;i++) { X[i]=ReceiveBuffer[i]; } // i= atoi(X); // printf("%s\r\n",i); //sprintf(addr1,"x=%d,y=%d,z=%d\r\n",i); sprintf(addr1,"x=%d,y=%d,z=%d\r\n",X); id_print(addr1); UCA0IE &= ~UCTXIE; UCA0IE &= ~UCTXCPTIE; __delay_cycles(8000000); } return 0; } //////////////// i2c.h ////////////////// #include <msp430.h> #include <stdint.h> #include <stdbool.h> //****************************************************************************** // Pin Config ****************************************************************** //****************************************************************************** #define LED_OUT P1OUT #define LED_DIR P1DIR #define LED0_PIN BIT0 #define LED1_PIN BIT1 //****************************************************************************** // Example Commands ************************************************************ //****************************************************************************** #define SLAVE_ADDR 0x50 /* CMD_TYPE_X_SLAVE are example commands the master sends to the slave. * The slave will send example SlaveTypeX buffers in response. * * CMD_TYPE_X_MASTER are example commands the master sends to the slave. * The slave will initialize itself to receive MasterTypeX example buffers. * */ #define CMD_TYPE_0_SLAVE 0 #define CMD_TYPE_1_SLAVE 1 #define CMD_TYPE_2_SLAVE 2 #define CMD_TYPE_0_MASTER 3 #define CMD_TYPE_1_MASTER 4 #define CMD_TYPE_2_MASTER 5 #define TYPE_0_LENGTH 1 #define TYPE_1_LENGTH 2 #define TYPE_2_LENGTH 6 #define MAX_BUFFER_SIZE 20 volatile int Rx_index=0; volatile unsigned int Rx_key=0; volatile int Tx_index=0; volatile unsigned int Tx_key=0; int size=0; unsigned char Data[15]=""; unsigned char RXData[5]=""; //uint8_t address1; //uint8_t address2; /* MasterTypeX are example buffers initialized in the master, they will be * sent by the master to the slave. * SlaveTypeX are example buffers initialized in the slave, they will be * sent by the slave to the master. * */ uint8_t MasterType2 [TYPE_2_LENGTH] = {'F', '4', '1', '9', '2', 'B'}; uint8_t MasterType1 [TYPE_1_LENGTH] = { 8, 9}; uint8_t MasterType0 [TYPE_0_LENGTH] = { 11}; uint8_t SlaveType2 [TYPE_2_LENGTH] = {0}; uint8_t SlaveType1 [TYPE_1_LENGTH] = {0}; uint8_t SlaveType0 [TYPE_0_LENGTH] = {0}; //****************************************************************************** // General I2C State Machine *************************************************** //****************************************************************************** typedef enum I2C_ModeEnum{ IDLE_MODE, NACK_MODE, TX_REG_ADDRESS_MODE, RX_REG_ADDRESS_MODE, TX_LSB_MODE, TX_DATA_MODE, RX_DATA_MODE, SWITCH_TO_RX_MODE, SWITHC_TO_TX_MODE, TIMEOUT_MODE } I2C_Mode; /* Used to track the state of the software state machine*/ I2C_Mode MasterMode = IDLE_MODE; /* The Register Address/Command to use*/ uint8_t TransmitRegAddr = 0; uint8_t TransmitRegAddr_1 = 0; /* ReceiveBuffer: Buffer used to receive data in the ISR * RXByteCtr: Number of bytes left to receive * ReceiveIndex: The index of the next byte to be received in ReceiveBuffer * TransmitBuffer: Buffer used to transmit data in the ISR * TXByteCtr: Number of bytes left to transfer * TransmitIndex: The index of the next byte to be transmitted in TransmitBuffer * */ uint8_t ReceiveBuffer[MAX_BUFFER_SIZE] = {0}; uint8_t RXByteCtr = 0; uint8_t ReceiveIndex = 0; uint8_t TransmitBuffer[MAX_BUFFER_SIZE] = {0}; uint8_t TXByteCtr = 0; uint8_t TransmitIndex = 0; /* I2C Write and Read Functions */ /* For slave device with dev_addr, writes the data specified in *reg_data * * dev_addr: The slave device address. * Example: SLAVE_ADDR * reg_addr: The register or command to send to the slave. * Example: CMD_TYPE_0_MASTER * *reg_data: The buffer to write * Example: MasterType0 * count: The length of *reg_data * Example: TYPE_0_LENGTH * */ I2C_Mode I2C_Master_WriteReg(uint8_t dev_addr, uint16_t reg_addr, uint8_t *reg_data, uint8_t count); /* For slave device with dev_addr, read the data specified in slaves reg_addr. * The received data is available in ReceiveBuffer * * dev_addr: The slave device address. * Example: SLAVE_ADDR * reg_addr: The register or command to send to the slave. * Example: CMD_TYPE_0_SLAVE * count: The length of data to read * Example: TYPE_0_LENGTH * */ I2C_Mode I2C_Master_ReadReg(uint8_t dev_addr, uint8_t reg_addr, uint8_t count); void CopyArray(uint8_t *source, uint8_t *dest, uint8_t count); I2C_Mode I2C_Master_ReadReg(uint8_t dev_addr, uint8_t reg_addr, uint8_t count)//0x53,0,1 { /* Initialize state machine */ MasterMode = TX_REG_ADDRESS_MODE; // address1=dev_addr; if(dev_addr==0x53) { TransmitRegAddr = reg_addr; } else { TransmitRegAddr = (reg_addr >> 8);//MSB TransmitRegAddr_1 = (reg_addr & 0xFF); // LSB } RXByteCtr = count;//1 TXByteCtr = 0; ReceiveIndex = 0; TransmitIndex = 0; /* Initialize slave address and interrupts */ UCB2I2CSA = dev_addr;//0X53 UCB2IFG &= ~(UCTXIFG + UCRXIFG); // Clear any pending interrupts UCB2IE &= ~UCRXIE; // Disable RX interrupt UCB2IE |= UCTXIE; // Enable TX interrupt UCB2CTLW0 |= UCTR + UCTXSTT; // I2C TX, start condition __enable_interrupt(); //for(i=0;i<1000;i++); __bis_SR_register(LPM0_bits); // Enter LPM0 w/ interrupts return MasterMode; } I2C_Mode I2C_Master_WriteReg(uint8_t dev_addr, uint16_t reg_addr, uint8_t *reg_data, uint8_t count) { /* Initialize state machine */ MasterMode = TX_REG_ADDRESS_MODE; //TransmitRegAddr = reg_addr;//0X32 //address2=dev_addr; if(dev_addr==0x53) { TransmitRegAddr = reg_addr; } else { TransmitRegAddr = (reg_addr >> 8);//MSB TransmitRegAddr_1 = (reg_addr & 0xFF); // LSB } //Copy register data to TransmitBuffer CopyArray(reg_data, TransmitBuffer, count); TXByteCtr = count; RXByteCtr = 0; ReceiveIndex = 0; TransmitIndex = 0; /* Initialize slave address and interrupts */ UCB2I2CSA = dev_addr; UCB2IFG &= ~(UCTXIFG + UCRXIFG); // Clear any pending interrupts UCB2IE &= ~UCRXIE; // Disable RX interrupt UCB2IE |= UCTXIE; // Enable TX interrupt UCB2CTLW0 |= UCTR + UCTXSTT; // I2C TX, start condition __bis_SR_register(LPM0_bits + GIE); // Enter LPM0 w/ interrupts return MasterMode; } void CopyArray(uint8_t *source, uint8_t *dest, uint8_t count) { uint8_t copyIndex = 0; for (copyIndex = 0; copyIndex < count; copyIndex++) { dest[copyIndex] = source[copyIndex]; } } //****************************************************************************** // I2C Interrupt *************************************************************** //****************************************************************************** #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) #pragma vector = USCI_B2_VECTOR __interrupt void USCI_B2_ISR(void) #elif defined(__GNUC__) void __attribute__ ((interrupt(USCI_B2_VECTOR))) USCI_B2_ISR (void) #else #error Compiler not supported! #endif { //Must read from UCB2RXBUF uint8_t rx_val = 0; switch(__even_in_range(UCB2IV, USCI_I2C_UCBIT9IFG)) { case USCI_NONE: break; // Vector 0: No interrupts case USCI_I2C_UCALIFG: break; // Vector 2: ALIFG case USCI_I2C_UCNACKIFG: // Vector 4: NACKIFG break; case USCI_I2C_UCSTTIFG: break; // Vector 6: STTIFG case USCI_I2C_UCSTPIFG: break; // Vector 8: STPIFG case USCI_I2C_UCRXIFG3: break; // Vector 10: RXIFG3 case USCI_I2C_UCTXIFG3: break; // Vector 12: TXIFG3 case USCI_I2C_UCRXIFG2: break; // Vector 14: RXIFG2 case USCI_I2C_UCTXIFG2: break; // Vector 16: TXIFG2 case USCI_I2C_UCRXIFG1: break; // Vector 18: RXIFG1 case USCI_I2C_UCTXIFG1: break; // Vector 20: TXIFG1 case USCI_I2C_UCRXIFG0: // Vector 22: RXIFG0 rx_val = UCB2RXBUF; if (RXByteCtr) { ReceiveBuffer[ReceiveIndex++] = rx_val; RXByteCtr--; } if (RXByteCtr == 1) { UCB2CTLW0 |= UCTXSTP; } else if (RXByteCtr == 0) { UCB2IE &= ~UCRXIE; MasterMode = IDLE_MODE; __bic_SR_register_on_exit(CPUOFF); // Exit LPM0 } break; case USCI_I2C_UCTXIFG0: // Vector 24: TXIFG0 switch (MasterMode) { case TX_REG_ADDRESS_MODE: if(TransmitRegAddr==0x50) { UCB2TXBUF = TransmitRegAddr; //0X32 MSB MasterMode = TX_LSB_MODE; } else { UCB2TXBUF = TransmitRegAddr; if (RXByteCtr) MasterMode = SWITCH_TO_RX_MODE; // Need to start receiving now else MasterMode = TX_DATA_MODE; // Continue to transmision with the data in Transmit Buffer } break; case TX_LSB_MODE: UCB2TXBUF = TransmitRegAddr_1; //LSB if (RXByteCtr) MasterMode = SWITCH_TO_RX_MODE; // Need to start receiving now else MasterMode = TX_DATA_MODE; // Continue to transmision with the data in Transmit Buffer break; case SWITCH_TO_RX_MODE: UCB2IE |= UCRXIE; // Enable RX interrupt UCB2IE &= ~UCTXIE; // Disable TX interrupt UCB2CTLW0 &= ~UCTR; // Switch to receiver MasterMode = RX_DATA_MODE; // State state is to receive data UCB2CTLW0 |= UCTXSTT; // Send repeated start if (RXByteCtr == 1) { //Must send stop since this is the N-1 byte while((UCB2CTLW0 & UCTXSTT)); UCB2CTLW0 |= UCTXSTP; // Send stop condition } break; case TX_DATA_MODE: if (TXByteCtr) { UCB2TXBUF = TransmitBuffer[TransmitIndex++]; // data=9 // UCB2CTLW0 |= UCTXSTP; TXByteCtr--; } else { //Done with transmission UCB2CTLW0 |= UCTXSTP; // Send stop condition MasterMode = IDLE_MODE; UCB2IE &= ~UCTXIE; // disable TX interrupt __bic_SR_register_on_exit(CPUOFF); // Exit LPM0 } break; default: __no_operation(); break; } break; default: break; } }