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MSP430F5510: Using an External Clock for XT2 (USB)

Darren (FAE)
Expert 5483 points
Part Number: MSP430F5510

I need to know the requirements for selecting an external clock source (CMOS oscillator) for XT2 for USB.
This design is considering a 4MHz clock source (this would also allow USB BSL due to auto-detect to set XT2 to bypass mode)
Can you confirm the values for the following parameters please?

- XT2 input max frequency variation
i.e. 4MHz ±2500ppm

- XT2 max input capacitance (in bypass mode for USB)
5.7 Schmitt-Trigger Inputs from the datasheet specs 5[pF] typical...

- XT2 input clock's max duty cycle variation (i.e. 45%~55%)
*Datasheet specs 40%~60% for 20MHz clock measured at ACLK. But for USB and 4MHz...?

- XT2 input clock's requirements for rise/fall time
If there are no rise/fall time requirements, is there a minimum pulse width required for voltage above VIH or below VIL from 5.7 Schmitt-Trigger Inputs

- XT2 input clock's jitter requirements
Are there any jitter requirements for the clock source?

Regards,
Darren

  • 0
    TI__Guru 56685 points

    Hello Darren,

    It seems you already found the specifications as Section 5.16 outlines them as well as note 4 to reference section Schmitt-trigger input section for when in bypass mode. For your questions:

    -USB BSL will not work as is when using a digital clock source for XT2, as it assumes a crystal is used and sets up the peripheral that way. You would need to modify the USB BSL to accommodate. See the Custom BSL section on www.ti.com/tool/MSPBSL 

    For your other questions, we don't specify any of the parameters you are asking about, so I cannot comment on specific values needed. Alos, the Duty Cycle spec you quote is the output Duty cycle of the XT2 peripheral in xtal mode, and not a specification for bypass mode. 

  • 0 in reply to Jace H
    TI__Expert 5483 points

    Hi Jace,

    I'm confused on something else, maybe I should have made another thread.

    My customer is using their MSP430F5510 with an external CMOS clock (4MHz) going into the XT2.
    Their application code sets XT2 MUX to BYPASS = 1 so they can use a CMOS clock input for USB module.

    But they haven't modified the USB BSL code from TI-factory.
    Can you confirm if there is no issue using a CMOS clock (4MHz) for the USB reference clock with the stock USB BSL?  

    My understanding is stock USB BSL with external CMOS clock means the MSP430 is trying to drive an external crystal, while also receiving the CMOS clock forcing itself into the XT2.

    Not ideal...any thoughts? Does USB BSL have some way to support bypassing XT2 so it can receive the external clock input, or does the USB BSL have to be modified first? (Can't modify it with a CMOS clock...)

    Kind of odd to have a device that supports both crystal / CMOS for USB, and includes USB BSL, but there is no comment in the datasheet or TRM that makes sure the customer knows stock USB BSL doesn't use bypass so a crystal needs to be used for USB BSL firmware R/W.

    Regards,
    Darren

  • +1 in reply to Darren (FAE)
    TI__Guru 56685 points

    Hello Darren,

    BSL FW is highly optimized in order to fit into the 2kB of Flash that is dedicated for BSL. As such, it makes assumptions on device configuration and most common use cases. It assumes the device has just come out of a reset and sets up the bare minimum needed for BSL operation. The appendix of the BSL User Guide describes each BSL version and the resources it uses. 

    As such for the USB BSL, the most common use case, is to utilize and external xtal; thus, the USB BSL sets up the device with that in mind. It has no way to determine if a digital oscillator is connected. In order to utilize USB BSL with an external digital oscillator, the customer will need to customize the USB BSL to utilize a digital oscillator instea dof an external xtal. They will need to modify both the onboard USB BSL code, and the RAM USB BSL code.

    To clarify the two USB BSL images, the USB stack is too large to fit into the 2kB of BSL space. So a bare minimal USB stack is loaded into the device in Flash, that is used to load a RAM based USB BSL that can do full USB stack. 

  • 0 in reply to Jace H
    TI__Expert 5483 points

    Hi Jace,

    I appreciate the clarification above.

    Just a quick follow-up about Table "5.7 Schmitt-Trigger Inputs – General-Purpose I/O" in the datasheet.
    The Vit+ and Vit- and Vhys are all specc'd for VCC = 3V...why?

    My customer needs to know these values for VCC = 3.3V; can we provide this data for this table?
    Section 5 even says:

    Typical (TYP) values are specified at VCC = 3.3 V and TA = 25°C, unless otherwise noted.

    So I'm wondering why the schmitt trigger inputs spec for VCC = 3V...is it just to show the "corner case requirements" in case VCC is at a minimum voltage?
    Datasheet doesn't mention VCC needs to be 3.3V±10%...

    Regards,

    Darren

  • 0 in reply to Darren (FAE)
    TI__Guru 56685 points

    Hello Darren,

    We won't be able to provide data for that particular specification outside the parameters listed int he datasheet. That being said, in my experience, those levels tend to track pretty linearly as a direct percentage of the VCC voltage. 

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