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Error in TA0IFG interrupt in TImer0 using UP mode.

Other Parts Discussed in Thread: MSP430F5438

i am using msp430f5438. i have made a code to implement the UP mode in TIMER 0 module of the mcu. my code is :-

;******************************************************************************
;  Description:- This program further implements the UP mode of Timers.
;                Here we use use interrupts at both TAxCCR0 and TA0IFG;
;******************************************************************************

#include <msp430x54x.h>

       RSEG    CSTACK
;...............................................................................
       RSEG    CODE
;...............................................................................
RESET     mov.w  #SFE(CSTACK),SP                                ;Initialise TOS
          mov.w  #WDTPW + WDTHOLD,&WDTCTL                       ;Stop WatchDog
          bis.b  #0FFh,&P1DIR                               ; set P1 to o/p mode
          mov.b  #00h,&P1OUT                                ;make P1 low
          mov.w  #TASSEL_2 + MC_1 + TACLR + TAIE,&TA0CTL  ;configure Timer0
          mov.w  #CCIE,&TA0CCTL0
          mov.w  #40000,&TA0CCR0         
          bis.w  #LPM1 + GIE,SR               ;enter LPM1 and enable general
                                              ;interrupts
          nop                                 ; For Debugger


;...............................................................................
TIMER0_A1_ISR      
;...............................................................................
 
             xor.b  #BIT1,&P1OUT
wait1         mov.w  #50000,R13
L2           dec.w  R13
             jnz    L2
             RETI                         

;...............................................................................
TIMER0_A0_ISR      
;...............................................................................
 
             xor.b  #BIT0,&P1OUT
wait         mov.w  #50000,R12
L1           dec.w  R12
             jnz    L1
             RETI                         


;...............................................................................
COMMON INTVEC              ;Interrupt-Vectors
;...............................................................................

        ORG  TIMER0_A1_VECTOR
        DW   TIMER0_A1_ISR
        ORG  TIMER0_A0_VECTOR  
        DW   TIMER0_A0_ISR
        ORG  RESET_VECTOR
        DW   RESET
        END

in this code the CCIFG interrupt is working but the TA0IFG interrupt is NOT WORKING  !! Please help me out !!

 

  • In your config (up mode), the TAIFG interrupt happens exactly 1 timer tick after the CCR0 interrupt. However, you do a lot of time-wasting inside your ISRs. Before you finished with running in circles inside the ISR (during which all other interrupts are blocked), there's another CCR0 interrupt pending already. And sicne CCR0 interrupt has priority, it will be handled first. And then further blocks any other interrupts while waiting inside the ISR, then being first priority again and so on.

    The interrupt for TAIFG is pending all the time, just your pointless waiting loop inside the CCR0 ISR (you have set up a timer, so why do you wait in a busy loop at all?) effectively blocks any CPU resources from ever being assigned to handle it. Even your main code would freeze if it weren't already set into LPM.

  • i removed the CCR0 ISR and then tried, but still i get the same error. The TA0IFG interrupt is not executing. I want to know if i am putting the correct vectors.

    Also does the counter keeps on counting when an Interrupt occurs or does it stop and then resumes after the ISR is executed ??

    Please help me out !!

  • i have written this code again. i removed CCRO interrupt and only enabled TA0IFG interrupt. when i run this, the led pin becomes high and does not blink. my code is :-

     

    ;******************************************************************************
    ;  Description:- This program further implements the UP mode of Timers.
    ;                Here we use use interrupts at both TAxCCR0 and TA0IFG;
    ;******************************************************************************

    #include <msp430x54x.h>

           RSEG    CSTACK
    ;...............................................................................
           RSEG    CODE
    ;...............................................................................
    RESET     mov.w  #SFE(CSTACK),SP                                ;Initialise TOS
              mov.w  #WDTPW + WDTHOLD,&WDTCTL                       ;Stop WatchDog
              bis.b  #0FFh,&P1DIR                               ; set P1 to o/p mode
              mov.b  #00h,&P1OUT                                ;make P1 low
              mov.w  #40000,&TA0CCR0
              mov.w  #TASSEL_1 + MC_1 + TACLR + TAIE,&TA0CTL  ;configure Timer0
                  
              bis.w  #LPM1 + GIE,SR               ;enter LPM1 and enable general
                                                  ;interrupts
              nop                                 ; For Debugger


    ;...............................................................................
    TIMER0_A1_ISR            ; Overflow Interrupt
    ;...............................................................................
     
                 xor.b  #BIT0,&P1OUT
                 RETI                         

    ;...............................................................................
    COMMON INTVEC              ;Interrupt-Vectors
    ;...............................................................................

            ORG  TIMER0_A1_VECTOR
            DW   TIMER0_A1_ISR
            ORG  RESET_VECTOR
            DW   RESET
            END

     

  • Ankit Agarwal said:
    the led pin becomes high and does not blink

    I bet it does. With ~MCLK/40 Hz. Check with a scope, not with the eye or a multimeter. :)

    Other than the CCR0 interrupt, which automatically clears the CCIFG bit in TA0CCTL0 when teh ISR is entered, the TIMER0_A1_VECTOR has several interrupt sources, so no IFG bit is cleared automatically. In your ISR, you do not clear it, so it is stills et, causing another interrupt immediately after exit.
    When readign the TA0IV register to determine which of the several IFG bits is the highest pending interrupt on this vector, the read of TA0IV automatically clears the corresponding IFG bit.
    In your case, there is only TAIFG, which you know and therefore do not check. But in this case, you'll need to set it to 0 manually.

  • Hi Jens,

                my code works now. Thanks very much for ur help !! :)

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