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Grace I2C

James Chaulk
Prodigy 20 points

Other Parts Discussed in Thread: MSP430G2231

After setting up the USI interface for I2C on an MSP430G2231 with the USI Bit Counter Interrupt enabled, CSL_init() ends with USIIFG set. This causes the program to immediately jump to the ISR. When I try to set the counter to a non-zero value and clear the USIIFG, I can only do one or the other; Whichever line is first will execute and the other has no effect when single stepping through the project. I have also tried clearing USIIFGCC and setting USICNTx to a non-zero value with USICNT = 0x01, but this only changed one bit. I'm not sure if this is a bug or if I have made a mistake in my code, but the code works in a regular project without Grace.

-James

  • 0
    Guru 227245 points

    James Chaulk said:
    when single stepping through the project

    Indeed. SInce the debugger doesn't freeze the world. It only freezes the CPU. Depending on the MSP it may also stop the clock that is clocking the transfer (but you'll need to manually activate this).

    If you single-step through the code, everything that could happen will happen while the CPU is frozen by the debugger. Don't forget, the CPU does not do the transfer, so the halted CPU will not hinder the transfer from continuing. It is a separate, independent hardware module.

    It's not a GRACE error. You are just too slow (by several magnitudes) to step through the code fast enough. :)

  • 0 in reply to Jens-Michael Gross
    Prodigy 20 points

    Right, as soon as the interrupt flag is cleared and the bit counter is non-zero a transmission occurs. Thank you for solving my novice mistake.

     

    -James

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