MSP430FG6626: SPI ports

I am not sure why you need four SPI ports since SPI is a multi-drop protocol which can communicate with multiple devices on a single port. Selected via a CS signal to each target. But you have four SPI ports available to be used in the normal way. A0, A1, B0, B1.

It shares the same pins for clock and chip select.  How would you use both if you need a clock and chip select for both?  Why do you have more than one if you feel only one should ever be needed.  There appears to be only one chip select.  How would I share this single interface?  Please provide details.

Regards,

Chris

The STE input pins are not chip selects except in slave mode. (The Enhanced version of the serial hardware can use the STE signal as an output to control a single slave. But this device doesn't have that.) Are you trying to run four SPI slaves?

In master mode you use GPIO pins of your choice to provide chip selects to as many targets as required.

Hi,

I saw there is an email discussing about this thread. Is it okay to close this thread and discuss through email?

Best regards,

Cash Hao