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MSP430 used to read 128K PCM stream

We are trying to use one of the 'G' series MSP430's for a DTMF application. I need to read the PCM stream which is a 128Kbit stream. I have manipulated the PCM stream and am only reading the necessary data (128Kbit per second). How can I use the MSP430 to input this PCM data? I could implement a 16-bit shift register to grab the data.

-Tom-

  • All G series devices have either an USI or an USCI module.

    The USI module supports SPI with a configurabel bit length. It is basically a shift register witch programmable length.
    All you need to do is to set the USI into slave mode, provide an external clock and set the register size to 16. You'll get an interrupt (or better, do a busy waiting at this speed) and read teh resulting word, then immediately set the bit counter to 16 again and receive the next.

    The USCI offers double buffering, that means, the next data is received while you still have time to read the last, but the bit size is limited to 8 bit. So you need to do two byte reads instead of one word.

    In any case, you'll need a clock signal that matches the data stream and 'clocks' the data in.

  • I just read SLAA178 – August 2003  PDF file and it specifies sample rate of 3640Hz (section 2.3). My sample rate is 8KZ. This affects the filters and I do not know how to change sample rate to 8Khz. Can you provide any information?? I know this is an OLD app. note, but...........................

    See attachments.

    4527.DTMF_Using_MSP430_slaa178.pdf

     

    0005.DTMF_Using_MSP430_FILES_slaa178.zip

     

    -Tom-

  • My interpretation of the 3640Hz sampling rate in the appnote is that it is the lowest frequency that can be achieved with an integer division of 32768Hz crystal frequency that is still more than twice the highest DTMF frequency.
    The timer is reset after it reaches the value 8 (CCR==8) so it counts from 0 to 8 = 9 cycles, which effectively divides 32768Hz by 9 as the trigger frequency of the ADC.
    It could have been chosed higher, but why lettign the CPU work more than necessary? 3640Hz is fast enough and gives teh CPU the most time between two samples for calculations.

    If you get 8kHz samping frequency, fine. The interrupt you get when a word has arrived replaces the ADC interrupt in the appnote. The base function DTMFDecode won't see a difference, teh current sample just appears in 'in' when the LPM is exited by the ISR.
    You'll need, however, a higher MCLK as the decoding funciton is called more often per second. If the appnote lists 3.4MHz as minimum, then you need at least 8, probably a bit more.

    If you don't want to analyze the algorithm, you can simply adjust the final comparisons.
    If the original compares with 500Hz for a DTMF frequency on 3640Hz sampling rate, it appears as 3640Hz*500Hz/8000Hz = 227.5Hz when the sampling rate is raised to 8kHz without change in the algorithm. (time is relative)
    However, I'd recommend enlarging the number of samples used in the calculation from currently 20 to 20*8000/3640 = 44 samples per loop. I haven't analyzed the code, so I cannot say what else needs to be adjust and how to do it. But that's the basic approach.

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