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MSP430F5500: Using External 24MHz Clock Oscillator on XT2

James Glick
Prodigy 30 points
Part Number: MSP430F5500

My applications requires an External 24MHz Clock Oscillator for MSP430.  Also, I must buffer and fanout two Clock Oscillator signals; one for MPS430 (SLAVE) and one for FPGA (Master).

Please confirm use of XT2IN and XT2OUT Pins.  External 24MHz Clock Oscillator Input to XT2IN and XTN2OUT not connected or terminated.  External 24MHz Clock Osc will be +3.3V Signal levels.

  • 0
    Guru 99605 points

    To use an external clock on XT2, you need to set UCSCTL6:XT2BYPASS=1 [Ref User Guide (SLAU208Q) Sec 5.2.5]. This turns off the internal crystal oscillator, and XT2OUT becomes a GPIO. 

    Here's an example which uses an external crystal on XT2. I expect if you change it to set XT2BYPASS=1 it will do what you want.

    https://dev.ti.com/tirex/explore/node?node=A__ALBfpc0QMW2xLWrN2dVRrA__msp430ware__IOGqZri__LATEST

  • 0 in reply to Bruce McKenney
    Prodigy 30 points

    Bruce, 

    Thanks for the details on XT2BYPASS=1 using an external Clock Oscillator.  Thus, the code must be changed and uploaded before this boots using the External 24MHz OSC.  If the 32Khz Crystal were installed on XT1, would the MSP430 bootup as expected from a Power-on Reset and can be enabled using software updates to use the External 24MHz OSC (XT2BYPASS=1), correct?

    Regards, James Glick

  • 0 in reply to James Glick
    Guru 99605 points

    The MCU will boot without either crystal, using the internal oscillator (DCO) [Ref User Guide (SLAU208Q) Sec 5.2]. On the F5500 (and many others) each of XT1 and XT2 has to be explicitly started by setting the appropriate P5SEL bits [Ref data sheet (SLAS645L) Tables 6-50/51].

    The comments in that example make an interesting point: At reset, ACLK and FLL are set to XT1 even though XT1 hasn't started yet. If you don't start XT1, but do start XT2, the (single ) OFIFG will be set (due to XT1), which prevents telling whether XT2 has started. That's why the example explicitly switches ACLK and FLL to the internal low-frequency oscillator (REFO).

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