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MSP430FR2111: REFO does not turn of, even though it is not used.

ArTzy
Genius 15129 points
Part Number: MSP430FR2111
Other Parts Discussed in Thread: MSP430FR2000

Hi Experts,

Seeking your assistance on this query from Cx:

Issue:
We conclude from our measurements that REFO does not turn off (find below how we came to this conclusion). We would like to know if that is a known issue in the MSP430FR2111 series. If not, how could this issue be resolved? Our primary goal is to lower current consumption in active mode.

Information from Datasheets:
According to theUser's Guide MSP430FR4xx and MSP430FR2xx family on page 103 chapter 3.2.3 internal trimmed Low-Frequency Reference Oscillator (REFO): "REFO consumes no power when it is not in use"

According to the Datasheet MSP430FR21xx, MSP430FR2000 Mixed-Signal Microcontrollers on page 24 Chapter 8.12.3.4 REFO: REFO oscillator current consumption 15uA at 3V

We made two measurements:
1.) we used REFO as MCLK as SMCLK and as ACLK. FLL=OFF, DIVM=1, DIVS=1
-> power consumption of MSP430 = 71.87uA at 3V

2.) we used an external 32.768kHz push pull clock on XT1IN pin with XT1BYPASS as MCLK as SMCLK and as ACLK.
FLL=OFF, DIVM=1, DIVS=1
-> power consumption of MSP430 = 72.12uA at 3V (the expected power consumption was 71.87-15= 56.87uA)

C-code:
measurement one, clock settings:

__bis_SR_register(SCG0); //disable FLL CSCTL4 |= SELMS__REFOCLK | SELA__REFOCLK; // selcect REFOCLK 32.768kHz

measurement two, clock settings:

//P2SELx = 10 set at pin 1.7 pinFunction to XIN P2SEL1 |= BIT7; //1 MSB P2SEL0 &=~ BIT7; //0 LSB // 1b = XT1 sources externally from pin (0_UsersGuide_MSP430FR4xx_and_MSP430FR2xx.pdf S.120) CSCTL6 |= XT1BYPASS; // must be done before asking if everthing is ok of course! do{ // waiting for OFIFG is a must, otherwise REFCLK is selected as fall back CLOCK! // the reason: FLL can only be disabled after OFIFG is Low CSCTL7 &= ~(XT1OFFG | DCOFFG); // Clear XT1 and DCO fault flag SFRIFG1 &= ~OFIFG; }while (SFRIFG1 & OFIFG); // Test oscillator fault flag __bis_SR_register(SCG0); //disable FLL CSCTL4 |= SELMS__XT1CLK | SELA__XT1CLK; // selcect external CLK source (RTC) for MCLK | selcect external CLK source (RTC) for ACLK CSCTL3 |= SELREF__XT1CLK;https://e2e.ti.com/tinymce//apis/embeddables/configure?typeId=dc8ab71f-3b98-42d9-b0f6-e21e02a0f8e2&id=undefined#https://e2e.ti.com/tinymce//apis/embeddables/configure?typeId=dc8ab71f-3b98-42d9-b0f6-e21e02a0f8e2&id=undefined#


For your assistance please.

Regards,
Archie A.

  • 0
    TI__Genius 9970 points

    Hi,

    Is the customer setting REFOLP in CSCTL3?

    Regards,

    Evan

  • 0 in reply to Evan Lew
    TI__Genius 15129 points

    Hello Evan,

    Apology for the late response since the customer just came from a Holiday.

    They're concerned about the MCU MSP430FR2111.

    The REFOLP bit in the CSCTL3 register is only available in MSP430 with an enhanced clock system the MSP430FR2111 however has a Basic CS.

    They also tried it out the bit REFOLP remains 0 when set to 1. The goal is anyway not to use the low power REFO but to use an external clock and disable the internal REFO like stated in my original question.

    According to the User’s Guide that should be possible.

    Screenshot of “3.2.3 Internal Trimmed Low-Frequency Reference Oscillator (REFO)” from “User's Guide MSP430FR4xx and MSP430FR2xx family”

    Thank you.

    73,
    Archie A.

  • 0 in reply to ArTzy
    TI__Genius 9970 points

    Hi Archie,

    The second code snippet looks like it should be disabling REF0 however I did notice that the customer is attempting to set SELREF = 0 with the code:

    CSCTL3 |= SELREF__XT1CLK

    However, the value for that field is 0 which cannot be achieve through a bitwise OR. Try:

    CSCTL3 &= ~SELREF__XT1CLK

    Since the reset value is of SELREF is already 0 I'm not sure if this is the issue. 

    The code shared above is missing formatting so I was hard for me to read. If this isn't able to resolve the customer's issue please have them share a code example that I can use directly to reproduce.

    Regards,

    Evan

  • 0 in reply to Evan Lew
    TI__Genius 15129 points

    Hello Evan,

    We finally found the time to redo the current consumption tests: it worked!
    The bug “CSCTL3 |= SELREF__XT1CLK;”
    fixed with “CSCTL3 &= ~SELREF__XT1CLK;” did not fix the issue. The SELREF__XT1CLK bit in the CSCTL3 register was already prior to this line ‘0’.
    But I made the exact same mistake one line above.

    Was:
    CSCTL4 |= SELMS__XT1CLK | SELA__XT1CLK;

    Fixed:
    CSCTL4 |= SELMS__XT1CLK;
    CSCTL4 &= ~ ( BIT8 | BIT9);  //select SELA__XT1CLK BIT8=0; BIT9=0


    Tests:

    1. Test if there is leak current:
       current consumption of MSP430 at 3.3V in LPM4.5 = 32.9nA -> no leak current [OK!]
    2. Test internal REFO:
      current consumption of MSP430 at 3.3V = 72.29uA -> [OK!]
    3. Test external 32.765kHz push-pull XIN Clock input:
      current consumption of MSP430 at 3.3V = 58.3uA -> Expected 57.71uA ->  [OK!]

    Thank you verry much for your help.

    Regards,
    Archie A.

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