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Original question:

MSP430FR2422: Issue with LPM 3.5 wakeup

MSP430FR2422: LPM 3.5 wakeup problem

prashanth k b
Prodigy 70 points
Part Number: MSP430FR2422


Hello,

We are using MSP430FR2422 as an RTC. We have configured LPM 3.5 with wakeup source as RTC overflow. We check the source of wakeup by reading the SYSRSTIV location which returns the value 0x08(i.e wake up from LPM3.5).

We have one controller where whenever there is a an RTC overflow, 0x04 is being set along with 0x08 in SYSRSTIV register. While reading the register for the first time 0x04 is being read, and next time 0x08 is read.

We have checked whether 0x04 is set continuously, but it is only being set during an RTC overflow.

We have configured the RST/NMI pin as NMI and also pulled up the RST/NMI pin to Vcc .

Please help us find the root cause for this issue.

  • 0
    TI__Guru 71216 points

    Hello - Regarding this observation, here is something to try - read the PMMLPM5IFG bit.  Is it set when SYSRSTIV = 0x04 or when SYSRSTIV = 0x08?

    By chance are you running with debugger attached and in debug mode when this happens?

    What is DVDD?
    Is there any other circuitry that might be causing noise on DVDD?
    What is the clock source and frequency used to clock the RTC?
    Is this the only device you have seen this behavior so far?

  • 0 in reply to Dennis Lehman
    Prodigy 70 points

    Hi, Thanks for the reply

    1. No, we are not using a debugger when this happens.

    2. DVDD is 3.3V

    3. No

    4. External crystal with 32768Hz.

    5.We had reported a similar problem on the forum before. There, the microcontroller was setting 0x02 on wakeup from LPM3.5 due to RTC overflow.

  • 0 in reply to prashanth k b
    TI__Guru 71216 points

    Hi Prashanth,

    I see the earlier posting where Eason has already provided some feedback. For others monitoring this thread, here is that LINK.

    Ok, so I assume this is the same MCU described in the earlier post, or is this another one?

    Out of curiosity, did you try the suggestion to read the PMMLPM5IFG bit on this particular device?  If so, what did you see?  This could be a clue to help us determine the issue.

  • 0 in reply to Dennis Lehman
    Prodigy 70 points

    Hi Dennis,

    This is not the same microcontroller, this is a different piece.

    We haven't tried reading the PMMLPM5IFG bit yet, we will do it and let you know the results asap.

  • 0
    Guru 25275 points
    prashanth k b said:
    We have configured the RST/NMI pin as NMI and also pulled up the RST/NMI pin to Vcc .

    Probably not a great idea.  Note also that the deglitch filter is enabled only in reset mode.

    Do you really need an external non-maskable interrupt input?

  • 0 in reply to David Schultz
    Prodigy 70 points

    Hi Dennis,

    1. We are checking SYSRSTIV register to identify the source of wakeup from LPM. Is it not advisable to use this?

    2. We don't need non-maskable interrupt input and neither do we need the reset functionality on that pin, is there any way to disable both?

    3. We have checked the PMMIFG register in this particular microcontroller and it is giving 0x8200.

  • 0 in reply to Dennis Lehman
    TI__Guru 71216 points

    I'm a little confused here. The issue is titled: 

    MSP430FR2422: LPM 3.5 wakeup problem

    Is the device you are seeing this issue, or is it a different MSP?

    Assuming this is the MSP430FR2422, do you see 0x8200 when SVSRST = 0x04, 0x08 or both?

  • 0 in reply to Dennis Lehman
    Prodigy 70 points
    Dennis Lehman said:
    Is the device you are seeing this issue, or is it a different MSP?

    In this thread we are talking about one particular microcontroller, which is different from the one mentioned in this LINK.

    We are using SYSRSTIV register to check whether device has woken up due to lpm wakeup sources or some other reset. In our code there are two sources for LPM wakeup. These are RTC overflow and Pin Interrupt.

    SYSRSTIV reads 0x08 on LPM wakeup. All other controllers except problematic one reads 0x08 on LPM wakeup from RTC overflow. But problematic controller reads 0x04 on LPM wakeup from RTC overflow.

    Dennis Lehman said:
    Out of curiosity, did you try the suggestion to read the PMMLPM5IFG bit on this particular device?  If so, what did you see?  This could be a clue to help us determine the issue.

    In the problematic controller we have read the PMMIFG register and PMMLPM5IFG bit is set when the above mentioned problem occurs.

  • 0 in reply to prashanth k b
    TI__Guru 71216 points

    Ok, so what if you were to read the SYSRSTIV register along with the PMMLPM5IG bit. That way your code will know there was an LPMx.5 wakeup either way.

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