ADC10 BUSY bit issue

Hi,

I am using ADC10 of MSP430F5310. I am having problem that ADC10BUSY bit is not getting reset. Below is my code.

int main(void)
{
int adc_val;
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer to prevent time out reset


// ACLK = REFO = 32.768kHz, MCLK = SMCLK = (Default DCO)/2 = (2MHz/2) = 1MHz
P5SEL |= 0x30; // Select XT1

UCSCTL6 &= ~(XT1OFF); // XT1 On
UCSCTL6 |= XCAP_0 + XT1DRIVE_1; // External load cap
// Drive strength for 8 to 16MHz

__bis_SR_register(SCG0); // Disable the FLL control loop
UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx
UCSCTL1 = DCORSEL_5; // Select DCO range 8MHz operation
UCSCTL2 = FLLD_1 + 122; // Set DCO Multiplier for 8MHz
__bic_SR_register(SCG0); // Enable the FLL control loop

UCSCTL3 |= SELREF_0; // Set DCO FLL reference = XT1
UCSCTL4 = SELA_0 + SELS_3 + SELM_3; // Set MCLK = SMCLK = DCOCLK & ACLK=XT1(32768Hz)


//-----------------------------------------------------------------
// Configure ADC for Motor Current Monitoring
// With ADC10OSC range is from 4.2 to 5.4MHz
// With 50ksps for one sample at least 20 uSec is required.
//----------------------------------------------------------------

ADC10CTL0 &= ~ADC10ENC; // Disable ADC10
ADC10MCTL0 |= ADC10INCH_4; // P6.4(A4),AVCC and AVSS,

// 16 ADC clock for single conversion
// Sample and conversion not starsted
ADC10CTL0 |= ADC10SHT_2;

// ADC10SC bit for start of conversion
// Single channel, single conversion, SMCLK/MODOSC
ADC10CTL1 |= ADC10SSEL_3 + ADC10CONSEQ_0; // SMCLK(8MHz)
// ADC10CTL1 |= ADC10CONSEQ_0; // MODOSC CLK(4.2-5.4MHz)

// 10bit Result,50ksps
ADC10CTL2 |= ADC10RES + ADC10SR;
ADC10CTL0 |= ADC10ON; // Turn ON ADC
P6SEL |= 0x10; // P6.4 ADC option select
//P6DIR &= ~0x10; // P6.4 As Input


__bis_SR_register(GIE);

while(1)
{
ADC10CTL0 |= ADC10SC + ADC10ENC; // Start Sampling
while(ADC10CTL1 & ADC10BUSY); // Wait till sample & coversion
adc_val=ADC10MEM0;
}
}

Please suggest if anything wrong.

khodidas