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Crystal high frequency mode available? - MSP430G2553

Other Parts Discussed in Thread: MSP430G2553

I am unable to get my MSP430G2553 application's MCLK going at 16 MHz using external crystal and a pair of 33 pF loading capacitors (all mounted within 6 mm of the DIP pins. Instead of expected 16 MHz operation, it is running at a very low frequency, under 100 kHz. I have been using sample code snippet from SLAU144H section 5.2.7.1, which includes the instruction "BIS.B #XTS,&BCSCTL1 ; HF mode".

I have selected a 16 MHz crystal as I would like to run the CPU at maximum rated speed and provide a stable source for the internal UART's bit rate generator.

Does the MSP430G2553 basic oscillator system omit the high frequency mode defined in SLAU144H controlled by BCSCTL1 XTS bit? I don't see description a high frequency crystal mode in SLAS375, but the description of the basic clock module in SLAU144H describes the mode.

Should rely on the DCO instead of an external crystal, given that I need to use the internal UART (for simple asynchronous communications)?

My application doesn't need 32 kHz or other low-speed mode - only 16 MHz - as it is not power critical.

 

Thank you,

Dave

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In SLAS375 (data sheet for MSP430G2553 series) I see this text on the first page:

• Basic Clock Module Configurations

– Internal Frequencies up to 16 MHz With Four Calibrated Frequency

– Internal Very-Low-Power Low-Frequency (LF) Oscillator

– 32-kHz Crystal

– External Digital Clock Source

This text appears later in the same document:

Oscillator and System Clock
The clock system is supported by the basic clock module that includes support for a 32768-Hz watch crystal
oscillator, an internal very-low-power low-frequency oscillator and an internal digitally controlled oscillator (DCO).
The basic clock module is designed to meet the requirements of both low system cost and low power
consumption. The internal DCO provides a fast turn-on clock source and stabilizes in less than 1 μs. The basic
clock module provides the following clock signals:
• Auxiliary clock (ACLK), sourced either from a 32768-Hz watch crystal or the internal LF oscillator.
• Main clock (MCLK), the system clock used by the CPU.
• Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.

 

In SLAU144H in section 5.2.3 this text appears regarding the basic clock module:

The LFXT1 oscillator also supports high-speed crystals or resonators when in HF mode (XTS = 1,
XCAPx = 00). The high-speed crystal or resonator connects to XIN and XOUT and requires external
capacitors on both terminals. These capacitors should be sized according to the crystal or resonator
specifications. When LFXT1 is in HF mode, the LFXT1Sx bits select the range of operation.

 

Which prevails?

 

  • A deeper look into the datasheet only reveals a section about XT1 Low frequency mode. There is no mentioning of high.frequency mode for this device in the datasheet.

    The family users guide is (as the name says) a family user guide. And teh 2x family is a quite large one. And many 2x family member support HF mdoe for XT1. The 2553 does not. And SLAU144h has a note added to the description of the XTS bit: not supported on MSP430x20xx devices. The MSP430G25xx is so new that it hasn't been added to this note yet.

    David Feldman said:
    Which prevails?

    Always the device-specific datasheet. the users guide is for all devices, teh datasheet s for a specific device.

    Edit: AFAIK the whole G series does neither have HF XT1 nor XT2 support.

  • Thank you, Jens-Michael.

    I also saw the same footnote in SLAU144h about MSP430x20xx exclusion.

    I will now continue work without HF mode.

     

     

     

     

  • For your information: experiemnts have revealed that XTIN in bypass mode can be supplied with a HF signal from an external oscillator, even if the datasheet does not list an input frequency above 50kHz for this mode.

    So if you use a quartz oscillator rather than a plain crystal, you can have an external HF high-precision clock attached to the MSP.

  • Thank you again, Jens-Michael.

    Initially I will try DCO but if external 16 MHz oscillator is acceptable to device specification for XIN (it is not clear when I read the specification, and LFXT1 block diagram shows some kind of circuit to avoid glitch, maybe filter, in path?). Anyway, external 16 MHz source is better long-term solution for me if it is accepted to MSP430G2553 spec.

    I assume TI designer intended that DCO is adequate for Asynchronous communications under worst-case difference of DCO. I am not so sure. Can you please look at this:

    According to DCO temperature/voltage tolerance, it seems variance between two endpoints (example, one at low-voltage and low-temperature limit, other at high-voltage and high-temperature limit, or however is needed to expose maximum difference in DCO Clock instantaneous frequency) is large enough to jeopardize correct operation of asynchronous transmission.

    According to MAXIM IC app note AN2141, they indicate 5% clock difference is at high end of tolerance. For two MSP430, it seems -6% and +6% DCO differential is possible.

    Do you have any thought on this, so I can decide if DCO is acceptable alternative?

    Thank you again for your kind information,

    Dave

  • David Feldman said:
    it is not clear when I read the specification

    No, the specification clearly reads
    LFXT1 oscillator logic level fLFXT1,LF,logic square wave input frequency, LF mode XTS = 0, XCAPx = 0, LFXT1Sx = 3 1.8 V to 3.6 V 10000 32768 50000 Hz

    So the specs allow only up to 50kHz as digital oscillator signal. However, tests with the earlier G devices have revealed that a HF signal is properly accepted. Only in the middle range (50kHz to 1MHz) there are problems. Possibly because of the deglitching unit you mentioned.

    If you search the forum, there is an older thread discussing this, complete with measurement results. However, I don't think the 2553 was subject of this test, so you should check it (well, attaching a signal from a frequency generator shouldn't be a problem). And of course a new silicon revision may render the results void.

    David Feldman said:
    For two MSP430, it seems -6% and +6% DCO differential is possible.

    Indeed, teh DCo may be out-of-spec for serial connections. However, the auto-baudrate detection of the USCI chip allows communication even without knowing the other sides baudrate. So the two MSPs may end up with different 'baudrate' settings and still work with exactly the same timing.
    Also, you can analyze the bit timing of incoming data and adjust the USCI baudrate divider 'on-the-fly'. The old modems did analyze any incoming data if it could be an 'AT' sequence in any supported baudrate. So you could just start sending a command in any of the usual baudrates and it was properly accepted. The auto-baudrate feature works similar, but if the other side (if is no MSP) cannot provide the necessary break/sync seuence, you can implement your own detection logic.

    The problem with DCO is that it is not only not stable (high temperature coefficient) but does only provide a very limited number of discrete (and drifting) frequencies. So you usually use the modulation. But modulation means that the DCO switched between two frequencies, introducing an additional clock jitter. If the baudrate divider isn't very high or an exact multiple of 32(the size of the modulation pattern), it introduces an additional drift for the bit timing. Also, it might be impossible to get the exact frequency you want.

    Also, since the DCO switches between a lower and a higher than the target frequency, you must not go near the maximum device frequency. If 16MHz is the maximum device frequency, a 16MHz programmed DCO may alternate between 17MHz and 15MHz (not that extreme, but you get the picture)

  • Thank you again, Jens-Michael.

    I have two possible directions to take, based on your replies and much additional reading. I am very grateful for your time/help.

    I think 16 MHz external oscillator will work as expected (and shown in your experiment), based on seeing a block diagram I saw on a product training brief at digikey (URL below, page 35 & 36 out of 39 pages - I have not found the same diagram in TI's MSP430G2553 data yet). If the (hopefully same) "minimum pulse" circuit shown two places (at the DCO output, and XIN input) on the clock subsystem diagram applies to the MSP430G2553, the minimum pulse circuit should pass 16 MHz signal from XIN. I queried TI support about this use and part type, but they did not reply (yet.) I feel the MSP430G2553 product data file lacks detail here that would help others in the future.

    http://dkc1.digikey.com/gr/en/tod/Texas_Instruments/MSP430_NoAudio/MSP430_NoAudio.html

    For using DCO itself to source BRCLK in UART over temperature, stabilizing procedure based on low frequency crystal, TIMER and appropriate software might be what TI designer intended. I have ordered 32.000 kHz crystal for test (because my application also needs time interval for A/D sampling at exact kHz multiple, so 32.768 kHz normally applied is not suited), and there are examples in TI's collateral to software stabilize the DCO.

    Thank you again,

    Dave

     

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