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MSP430F6436: DAC glitch when using P6.6 and P7.6 at the same time

Guru 12235 points
Part Number: MSP430F6436

Hi, 

0.4 to 2.0V output is generated from a reference voltage of 2.5V using DAC0 on P6.6.

If you use it as the port GPIO of P7.6 and set it to High, the output of DAC0 of P6.6 will drop by about 0.15V from the current output. Setting other ports to High has no effect.

The P7.6 is equipped with DAC0 as a dual-purpose function, but does that have any effect? If there is any countermeasure, please let me know.

I suspect it is related to the question below.
https://e2e.ti.com/support/microcontrollers/msp-low-power-microcontrollers-group/msp430/f/msp-low-power-microcontroller-forum/647668/msp430f5659-glitch-at-dac0-on-pin-p7-6-when-togling-digital-output-p6-6?tisearch=e2e-sitesearch&keymatch=P7.6%E3%80%80P6.6#

Also, the errata guide disappeared from the web, so it was not possible to confirm whether it was an errata.

Thanks,

Conor

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