Part Number: MSP430FG6626
Hi, we hooked up a XT2 on our board with the following settings in code:
P7SEL |= BIT2 | BIT3; // Port select XT2IN/XT2OUT
UCSCTL6 &= ~XT2OFF; // Enable XT2
// Loop until XT1,XT2 & DCO stabilizes
do
{
// Clear XT2,XT1,DCO fault flags
UCSCTL7 &= ~(XT2OFFG | XT1LFOFFG | DCOFFG);
// Clear fault flags
SFRIFG1 &= ~OFIFG;
attempts--;
} while ((SFRIFG1 & OFIFG) && attempts);
UCSCTL4 = (SELA__XT2CLK | SELS__REFOCLK | SELM__DCOCLKDIV);
P2DIR = BIT1;
P2SEL = 0;
P2OUT = 0;
P2IE = 0;
With SELA__XT2CLK, when we hook a probe to the the GPIO P2.0/P2.1 etc we see the XT2 clock outputting to those pins, even though we set the SEL to 0,
If we use a different clock source such as SELA__DCOCLK or SELA__REFOCLK it doesn't do this.
When XT2 is used, is it always set to override the GPIO settings and output to that?
