Part Number: MSP430F5528
Hi team,
My customer use MSP430 sends and receives SPI in slave mode using DMA1(RX), DMA2(TX) and usually it works fine.
However, after overrun or clock loss occurs by removing the STE signal or breaking the slave, reset process based on the STE signal is attempted to recover but it seems that the shift register is not initialized.
It is assumed that the data remaining in the transmit register is being output repeatedly.
The SPI module is SCB0.
//******************************************************************************
// yk2023
//This is the PORT1_VECTOR interrupt vector service routine
//
//******************************************************************************
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=PORT1_VECTOR
__interrupt
#elif defined(__GNUC__)
__attribute__((interrupt(PORT1_VECTOR)))
#endif
void Port_1 (void)
{
// ISP reset
USCI_B_SPI_transmitData(USCI_Bx_BASE, TxNull);
USCI_B_SPI_disable(USCI_Bx_BASE);
USCI_B_SPI_enable(USCI_Bx_BASE);
DMA_disableTransfers(DMA_CHANNEL_1);
//Enable DMA transfers on channel 1
DMA_enableTransfers(DMA_CHANNEL_1);
DMA_disableTransfers(DMA_CHANNEL_2);
//Enable DMA transfers on channel 0
DMA_enableTransfers(DMA_CHANNEL_2);
//P1.4 IFG cleared
GPIO_clearInterrupt(
GPIO_PORT_P1,
GPIO_PIN4
);
}
The source of the SPI portion can be provided if necessary.
If you have any questions, please let me know.
Thank you in advance.
Best regards,
Kenley
