MSP430F5521: Programming issue

/**************************************************
 * main_5521.c
 * 
 *  
 *
 * 
 *
 * zur shimon
 *
 **************************************************/

#include <msp430.h>
//
#define EXTERN 
#include "var_def.h"


//
 #include "com_all.h"

char  rd_sw(void);
void musb(void);
void write_SegX(char value);
void set_com_for_TX(void);
/**************************************************
 *int main(void)
 * 
 * 
 *
 * 
 *
 **************************************************/

 int main(void)
{

 
  WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT
  P3SEL = BIT3+BIT4;                        // P3.4,5 = USCI_A0 TXD/RXD
  
  //
  P5SEL |= BIT4 + BIT5; 
  //
  
 
  UCSCTL2 |= 144;  
 
///
 UCSCTL1 =0x30;
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  

  __delay_cycles(100000/10);// delay for ~3ms
  ////
 
  P3SEL |= BIT3+BIT4;                       // P3.3,4 = USCI_A0 TXD/RXD
  UCA0CTL1 |= UCSWRST;                      // **Put state machine in reset**
  UCA0CTL1 |= UCSSEL_2;                     // SMCLK

 UCA0BR0 = 238;                              // 
  UCA0BR1 = 1;    
 // UCA0MCTL |= ( UCBRF_0);   
    UCA0MCTL |= UCBRS_3; 
 

  
  UCA0CTL1 &= ~UCSWRST;                     // **Initialize USCI state machine**
  UCA0IE |= UCRXIE;                         // Enable USCI_A0 RX interrupt

     UCA0CTL1 |= UCSSEL_2 + UCRXEIE;           // SMCLK; receive erroneous bytes
  
 
 
 
  
  
  
    P2DIR |=(BIT5|BIT6);
    set_com_for_RX();
   
__bis_SR_register(LPM0_bits + GIE);       // Enter LPM0, interrupts enabled
  __no_operation();                         // For debugger
}

// Echo back RXed character, confirm TX buffer is ready first

#pragma vector=USCI_A0_VECTOR
__interrupt void USCI_A0_ISR(void)

{
char in_data;
  switch(__even_in_range(UCA0IV,4))
  {
  case 0:break;                             // Vector 0 - no interrupt
  case 2:                                   // Vector 2 - RXIFG
    
    while (!(UCA0IFG&UCTXIFG));             // USCI_A0 TX buffer ready?
 // set_com_for_TX();
    //   set_com_for_RX();
   in_data = UCA0RXBUF; 

   set_com_for_TX();
   
   
    UCA0TXBUF =  0x55;                  // TX -> RXed character
    while(1)
    {
     __delay_cycles(100000);
     UCA0TXBUF =  0x55;   
    } 
     
set_com_for_RX();
    break;
  case 4:break;                             // Vector 4 - TXIFG
  default: break;
  }
}
  
  
  
  
  
  
  
  
 
void set_com_for_TX(void)
{
 
 __delay_cycles(10000);
  P2OUT |=BIT6 ; 
    P2OUT |=BIT5 ; 
  __delay_cycles(10000);
  
}// end  void timer_utl(void)


void set_com_for_RX(void)
{
  // P5DIR |= BIT6;                            // led set as output
     __delay_cycles(10000);
 P2OUT &=~BIT5 ;
 P2OUT &=~BIT6 ; 
   __delay_cycles(10000);
}// end  void timer_utl(void)


void print_text(char *txt)
{
  set_com_for_TX();
   char i=0;
    while(*(txt+i) >0)
    {
      while (!(UCA0IFG&UCTXIFG));             // USCI_A0 TX buffer ready?
     UCA0TXBUF =  *(txt+i);
      __delay_cycles(10000);
      i++;
      
    }
 
 // wr_crlf();
}