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MSP430FR2532: Captivate CAPT_blockOnFlag()

Ibrahim Sangi
Prodigy 20 points

Part Number: MSP430FR2532

Hi,

I am wondering why in CAPT_blockOnFlag(); we have to stall the running program. 

//! Use CAPT_blockOnFlag to safely stall the running program in the
//! specified LPM mode until a boolean flag is set to true and the CPU
//! is awakened.

//*****************************************************************************
// CAPT_ISR.c
//
//! CapTIvate&tm; peripheral interrupt service routine.
//
//! The ISR serves to set status flags that may be used by the application.
//! The CapTIvate&tm; ISR always exits in CPU active mode.
//
//! \version 1.83.00.05
//! Released on May 15, 2020
//
//*****************************************************************************
//*****************************************************************************
//! \addtogroup CAPT_ISR
//! @{
//*****************************************************************************

#include <msp430.h>
#include <stdbool.h>
#include "CAPT_HAL.h"

//*****************************************************************************
//
//! \var g_bEndOfConversionFlag is a global flag used to indicate to the
//! CAPT_Touch layer when a conversion has completed. This flag must be set
//! by the application's CapTIvate&tm; ISR to communicate to the touch layer
//! when a conversion has completed.
//
//! \var g_bDetectionFlag
//! This bool is set by the CapTIvate&tm; ISR when a detection interrupt occurs.
//
//! \var g_bConvTimerFlag
//! This bool is set by the CapTIvate&tm; timer when it is time to update (refresh)
//! the user interface.
//
//! \var g_bConvCounterFlag
//! This bool is set by the CapTIvate&tm; ISR when a conversion counter interrupt
//! occurs.
//
//! \var g_bMaxCountErrorFlag
//! This bool is set by the CapTIvate&tm; ISR when a maximum count error interrupt
//! occurs.
//
//*****************************************************************************
volatile bool g_bEndOfConversionFlag;
volatile bool g_bDetectionFlag;
volatile bool g_bConvTimerFlag;
volatile bool g_bConvCounterFlag;
volatile bool g_bMaxCountErrorFlag;

//*****************************************************************************
//
//! CAPT_ISR is the Captivate peripheral interrupt service routine.
//
//*****************************************************************************
#pragma vector=CAPTIVATE_VECTOR
__interrupt void CAPT_ISR(void)
{
switch(__even_in_range(CAPT_getInterruptVector(), CAPT_IV_MAX_COUNT_ERROR))
{
// End of Conversion Interrupt
case CAPT_IV_END_OF_CONVERSION:
g_bEndOfConversionFlag = true;
break;

// Detection Interrupt
case CAPT_IV_DETECTION:
g_bDetectionFlag = true;
break;

// Timer Interrupt
case CAPT_IV_TIMER:
g_bConvTimerFlag = true;
break;

// Conversion Counter Interrupt
case CAPT_IV_CONVERSION_COUNTER:
g_bConvCounterFlag = true;
break;

// Max Count Error Interrupt
case CAPT_IV_MAX_COUNT_ERROR:
g_bMaxCountErrorFlag = true;
break;
}
__bic_SR_register_on_exit(LPM0_bits);

}

Why we have to exit with LPM0bit.

if I delete this line __bic_SR_register_on_exit(LPM0_bits);

The code hangs and don't do anyting.

Thank you

  • 0
    TI__Mastermind 26195 points

    Hi Ibrahim Sangi 

    code  __bic_SR_register_on_exit(LPM0_bits) function is exit LPM0.

    if you remove this code. CPU will keep on LPM0

    Thanks

  • 0 in reply to Xiaodong LI
    Prodigy 20 points

    If I remove this the code doesn't work at all. 

  • 0 in reply to Ibrahim Sangi
    TI__Mastermind 26195 points

    Hi Ibrahim Sangi 

    Please don't remove this code. otherwise, CPU will keep on LPM0

    I suggest you can run the register-level example code https://www.ti.com/tool/download/SLAC700 to check the feature of code  __bic_SR_register_on_exit(LPM0_bits)

    Thanks

  • 0
    Prodigy 20 points

    "Please don't remove this code. otherwise, CPU will keep on LPM0"

    I don't want the CPU to be in LPM0 mode. I want the CPU to remain active when we exit from ISR

  • 0 in reply to Ibrahim Sangi
    TI__Mastermind 26195 points

    Hi Ibrahim Sangi 

    Yes, you can modify the code to keep MCU is always on active mode

    Please check this basic example code "msp430fr243x_adc10_01.c" on the register-level example code https://www.ti.com/tool/download/SLAC700

    This part of code is let MCU move to LPM0 mode and wait for interrupt

            ADCCTL0 |= ADCENC | ADCSC;                           // Sampling and conversion start
            __bis_SR_register(LPM0_bits | GIE);                  // LPM0, ADC_ISR will force exit
            __no_operation();                                    // For debug only

    In interrupt handling, this code is let MCU move from LPM0 to active mode. otherwise, MCU will keep on LPM0 mode out of the interrupt handling

            case ADCIV_ADCIFG:
                ADC_Result = ADCMEM0;
                __bic_SR_register_on_exit(LPM0_bits);            // Clear CPUOFF bit from LPM0
                break;

    This is the example to show the feature of this code.

    if you need keep MCU is always on active mode, Please remove both "__bis_SR_register(LPM0_bits | GIE);   "  and " __bic_SR_register_on_exit(LPM0_bits); ".

    Thanks!

  • 0
    Prodigy 20 points

    I removed both and the code did not work.

    so when I put __bic_SR_register_on_exit(LPM0_bits); back into the #pragma vector=CAPTIVATE_VECTOR
    __interrupt void CAPT_ISR(void) function.

    The code starts to work. I just want CPU active all the time with working code

  • 0 in reply to Ibrahim Sangi
    TI__Mastermind 26195 points

    Hi Ibrahim Sangi 

    >> I removed both and the code did not work.

    Could you please explain which code MCU will stop at when you remove the both codes?

    Thanks

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