This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

EVM430-FR6043: Crystal oscillator load capacitor sizing

Part Number: EVM430-FR6043


Hi!

I'm exploring the EVM430-FR6043 reference design and would like to replicate the MCU and the analog part in my own design.

Upon studying the reference designs crystal oscillators I noticed that the load capacitors for HFXT (designator Y1) and USSXT (designator Y3) had been sized differently than I would have assumed. I would like to understand why have these oscillator and load capacitor combinations been selected in order to make sure that I'm not missing something critical.

1) USSXTAL
In the reference design there are two options for USSXTAL; AWSCR-8.00CV-T (designator Y3) and ABLS-8.000MHZ-B4-T (designator Y4), for which there are load 12pF load capacitors (designators C11 and C12) in place. On my EVM430-FR6043 evaluation board I can see that Y3 is chosen to be populated along with the load capacitors.

My first question is why is this? AWSCR-8.00CV-T seems to have integrated capacitors so why are C11 and C12 assembled? AWSCR-8.00CV-T (Y3) has capacitance of 22pF, while the optional ABLS-8.000MHZ-B4-T (Y4) has 18pF. My expectation is that C11 and C12 would only have been needed if Y4 was populated instead of Y3.

2) HFXTAL
The HFXTAL is ABM3-8.000MHZ-D2Y-T (designator Y1) and has load capacitance of 18pF. Along with it there are two load capacitors C15 and C16, both 12pF, in place. My rule of thumb has been to size the capacitors accoring to Cx = 2 x (Cload - Cstray), where Cx is external load capacitor, Cload is the load capacitance of the crystal oscillator and Cstray is the stray capacitance. I would assume the Cstray to be in the order of 3pF - 5pF. However, calculating the load capacitors this way, I get 2 x (18pF - 5pF) = 26pF to 30 pF (depending on the assumed stray capacitance). Both of these are of course way off the 12pF used in the EVM430-FR6043 development board. Why is this combination of crystal oscillator and load capacitors selected?

Thank you for your insight.

  • Hi Tuomas,

    Welcome to the e2e forums. 

    Your evaluation on the load caps make sense to me in both cases.

    I've checked a few boards on my end, and for USSXTAL, the inclusion of the load  capacitors with Y3 does seem to be consistent. The hardware seems to be using Y3 with the extra Cload without issue across a few older versions of the board as well. Its possible this resonator was changed for supply reasons and the BOM was never properly updated on TI.com, or that there is another reason for this, I will check internally to see if that is the case. It make take a few days to track someone down who knows this for certain, as the engineers that worked on this board are currently out for the holidays. 

    Regarding HFXOUT I don't believe the USS example code is actually using the HF crystal, so it shouldn't interfere with operation. That said I would expect the oscillation frequency to be off-center with those capacitor values. 

    Best Regards,
    Brandon Fisher

  • Hi Tuomas,

    I appreciate your patience, I finally got a response on the USSXT value. The additional capacitance from C11/C12 is intentional, and is recommended due to our testing on the EVM/development boards for the most accurate USSXT frequency. If you use a different value or remove those entirely you may get an error related to the HSPLL accuracy. 

    Small errors on the USSXT however can usually be ignored, as they do not affect dTOF/absTOF very much.

    Best Regards,
    Brandon FIsher

  • Thank you very much for getting back to my issue. Your previous post and the latest reply resolve this issue for me.

**Attention** This is a public forum