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TA0 in compare mode

Carloalberto Torghele
Intellectual 835 points

Other Parts Discussed in Thread: MSP430F5510


Hi!

I'm using a MSP430F5510.

In need to use TA0 in compare mode in order to generate interrupts at specific time intervals.

I do not understand a couple of thing of how the timer work.


- First issue:

I do not need to use the ouput functionalities of the timer.

If I use TA0CCR0 can i use P1.1 as a generale purpose pin?
As far as i can understand in order to do that I should let P1SEL.1 at 0. Is it correct?


- Second issue:

Let's suppose i set compare register 0,1,2,3

TA0CCRn  = delay_n;   
TA0CCTLn = CCIE;

if after a while i do not need any more the timings associated with register 2, i would do

TA0CCTL2 = 0;

do i also need to write 0 in TA0CCR2?

I do not see any "stop flag" for the single register. Is it enough to disable CCIE?


- Third issue:
in the data sheet i can not find any pin associated with compare register 5 and 6. Is it that with my microcontroller there are just 5 compare register and not 7 or is it that register 5 and 6 do not have ouput (and input) capability?

Thank you very much!


Carloalberto

  • 0
    Guru 227245 points

    Carloalberto Torghele said:
    If I use TA0CCR0 can i use P1.1 as a generale purpose pin?
    As far as i can understand in order to do that I should let P1SEL.1 at 0. Is it correct?

    Yes. If you need a CC unit for generatign an interrutp only, you don't need to switch teh associated I/O pin to module usage and it is available for GPIO.

    Carloalberto Torghele said:
    Let's suppose i set compare register 0,1,2,3

    TA0CCRn  = delay_n;   
    TA0CCTLn = CCIE;

    if after a while i do not need any more the timings associated with register 2, i would do

    TA0CCTL2 = 0;

    do i also need to write 0 in TA0CCR2?

    Clearing the CCIE bit (whcih you do by writing 0 to TA0CCTL2) is suffifient to stop the interrupts. The value '0' in TACCR2 is no special value and not different from any othe rvaleu in this register. It is just a number for comparison.

    The CCIFG bit in the CCTL register will still be set when TA0R equals TA0CCR" next time, but since CCIE bit is clear, no interrupt occurs. However, before setting CCIE again, you should clear the CCIFG bit and program TA0CCR2 with an appropriate value for the next interrupt.

    Carloalberto Torghele said:
    in the data sheet i can not find any pin associated with compare register 5 and 6. Is it that with my microcontroller there are just 5 compare register and not 7 or is it that register 5 and 6 do not have ouput (and input) capability?

    On 5510, TA0 only has 5 CCRs. TA may have up to 7, but not on this chip. And TA1 and TA2 have only 3.
    TB has 7 CCR units, but no output pins at al. However, the 5510 has a port mapping controller that allows routing internal signals to output pins independent of the default configuration. On 5510 this is limited to Port 4 and the USCI/TimerB/Comparator signals.  So if you want to have TB.0-T1.6  on P4.0-P4.6, you can configure this.
    See Datasheet, Short-Form-Description->Peripherals->Port mapping controller

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