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Timer0 A0 CCIFG weirdness

MotoPauld
Prodigy 70 points

Other Parts Discussed in Thread: MSP430F6638

Hi, for the below example code, when executed on my MSP430F6638 rev A part I would expect that the CCIFG for the TA0CCTL0 to be asserted after a compare event occurs.... instead I see that the CCIFG flags for TA0CCTL1 thru TA0CCTL6 are asserted(1) and TA0CCTL0 CCIFG flag = 0... Is there an explanation for this??

I'm using CCS 4.2.4.00033 and the MSP- TS430PZ100USB eval board... Any help would be appreciated, Thanks....

 

 

#include

 

 

<msp430f6638.h>

 

 

 

 

 

void

 

 

main(void)

{

WDTCTL = WDTPW + WDTHOLD;

 

 

// Stop WDT

P1DIR |= 0x01;

 

 

// P1.0 output

TA0CCTL0 = CCIE;

 

 

// CCR0 interrupt enabled

TA0CCR0 = 50000;

TA0CTL = TASSEL_2 + MC_1 + TACLR;

 

 

, clear TARupmode// SMCLK,

 

__bis_SR_register(LPM0_bits + GIE);

 

 

// Enter LPM0, enable interrupts

__no_operation();

 

 

// For debugger

}

 

 

 

// Timer0 A0 interrupt service routine

 

 

 

vector=TIMER0_A0_VECTOR pragma#

__interrupt

 

void TIMER0_A0_ISR(void)

{

P1OUT ^= 0x01;

 

 

// Toggle P1.0

}

 

  • 0
    Expert 1170 points

    Hi, note that all interrupt flags of the MSP430 are even set in cause the interrupt is disabled. The interrupt enable is only used to enable the interrupt processing (jumping into the interrupt service routine).

    In your code you have not defined the TA0CCTL1...6 registers. The default value causes that the CCR1...6 blocks are operating in compare mode and TACCR1...6 registers default value is also 0000h. So for each CCR block there is a state where the IFG flags are set. Therefore you see that for the unused CCR blocks the IFG flags are set.

    Nevertheless, for the CCR0 block you should see that its interrupt service routine is processed. Has you tried to set a breakpoint in the ISR (to ensure that the ISR is executed)? Do you see in the Control Register view that the Timer_A counter is changing?

  • 0 in reply to Voyager
    Prodigy 70 points

    Hi, ok for TA0CCTL1...6, if I disable compare functions the CCIFG flag(s) are set to 0.... The issue I don't understand is when the int event occurs the TA0CCTL0 CCIFG is set to 0 in debug when breaking on the event, I would expect that the CCIFG flag for TAC0CCTL0 would be set to 1 when the event occurs... Now looking at it from 5000 feet, it must be a self clearing inturupt? Thanks....

  • 0 in reply to MotoPauld
    Expert 1725 points

    MotoPauld said:
    Now looking at it from 5000 feet, it must be a self clearing inturupt?

    Check out User Guide slau208i section 14.2.6.1 TAxCCR0 Interrupt:

    The TAxCCR0 CCIFG flag has the highest Timer_A interrupt priority and has a dedicated interrupt vector
    as shown in Figure 14-15. The TAxCCR0 CCIFG flag is automatically reset when the TAxCCR0 interrupt
    request is serviced.

     

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