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MSP430FR5964: I2C hangs after writing half a byte

Richard Kovacs
Prodigy 20 points

Part Number: MSP430FR5964

Tool/software:

Dear All,

I have encountered a very strange behaviour while using I2C as MSP master with a slave.

I am trying to write 4 bytes of data to the slave to a given address. Sometimes during the second byte the writing hangs and everything is stuck.

Here is a photos of the byte being transmitted only in half (4bits):

When the above happens I get a STP interrupt, which I am not sure how. I am not sending an STP condition, and as far as I know a STP is never sent in the middle of a transmission.

When it works it all seems fine, all the four bytes are transmitted.

Do you have any idea what can cause the above? I have completely run out of ideas to check.

Thanks in advance,

Richard

  • 0
    Guru 103325 points

    What happens after that (off the right hand side of the screen)? Do SDA/SCL stay low "forever"?

    The slave is allowed to stretch the clock mid-byte, though I don't recall having seen this happen. What device are you talking to?

    The I2C is susceptible to noise, due to the "passive high". Noise ("properly" timed) can cause various strange symptoms. This looks like a scope (rather than an analyzer) trace, so I expect that would be visible -- maybe off the right side of the screen? 

    [Edit: Could this be as simple as turning SMCLK off (LPM > 0)? The clock-request system is supposed to avoid this, but maybe there's something there.]

  • 0 in reply to Bruce McKenney
    Prodigy 20 points

    Yes, SDA/SCL stays low, until I reset everything, restart the slave, and try again.

    I am talking to a HDS800PS48 power supply.

    Strangely, after the bogous STP condition, the SCL keeps on going but the SDA stays high forever.

    As for noise, we also thought about that, but the scope signal we saw never really confirmed that there could be any kind of noise.

  • 0
    Guru 26535 points

    I see no stop condition in those signals. With I2C start and stop are signalled by having SDA change state while SCL is high. You can see the high to low transition on SDA with SCL high to signal a start at the beginning but there is no change in SDA after the last bit. SDA stays low. It has to go high with SCL high to signal a stop.

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