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MSP430F5529: Unable to change clock source to XT2

Part Number: MSP430F5529

Tool/software:

I am working on MSP430F5529LP development board. By default it runs at 1MHz. The development board also comes with a 4MHz crystal which can be used as a clock source at XT2. I am trying to do that, but for some reason, the code gets stuck in a while loop because the XT1LFOFFG flag is never cleared. Here is my code for reference:

void initClocks(void) 
{
    // Step 1: Configure XT2 pins
    P5SEL |= BIT2 | BIT3;      // Select XT2 function on P5.2 and P5.3
    // Step 1: Disable XT1
       UCSCTL6 |= XT1OFF;         // Explicitly turn off XT1

       // Step 2: Set ACLK to use REFO
       UCSCTL4 = (UCSCTL4 & ~SELA_7) | SELA__REFOCLK; // Use REFO for ACLK

       // Step 3: Configure XT2 for MCLK and SMCLK
       P5SEL |= BIT2 | BIT3;      // Enable XT2 function on P5.2 and P5.3
       UCSCTL6 &= ~XT2OFF;        // Enable XT2 oscillator

       // Step 4: Wait for XT2 to stabilize
       do {
           UCSCTL7 &= ~(XT1LFOFFG | XT2OFFG); // Clear XT1 and XT2 fault flags
           SFRIFG1 &= ~OFIFG;                 // Clear global oscillator fault flag
           __delay_cycles(5000);              // Delay for stabilization
       } while (SFRIFG1 & OFIFG);             // Wait until faults are cleared

       // Step 5: Set MCLK and SMCLK to use XT2
       UCSCTL4 = (UCSCTL4 & ~(SELM_7 | SELS_7)) | SELM__XT2CLK | SELS__XT2CLK;

       // Step 6: Set dividers (optional)
       UCSCTL5 &= ~(DIVM_7 | DIVS_7); // Clear dividers
       UCSCTL5 |= DIVM__1 | DIVS__1;  // No division for MCLK and SMCLK
}

It gets stuck in Step-4.

What could be the problem? I am calling this function right after I stop the watchdog. 

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