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MSP430F6775A: LCD_C

Part Number: MSP430F6775A

Tool/software:

HI!

I would like to ask about LCDFRMIFG which is set after I set  LCDCVCTL = LCDCPEN and cannot be reset during debugging.Is it okay or it indicates some misconfiguration? I have used example configuration which is included in CCS for particular model.

  • Hi Peter,

    Please see below description about LCDFRMIFG:

    So, it alwasys set when the frame boundary.

    B.R.

    Sal

  • Hi,

    Yeah I have seen this but I have written data to the memory register to light up proper segments. Should not it be cleared automatically ? 

    Thank you.

  • Hi Peter,

    Yes, it is expected to clear.

    While how do you find its flag? I suggest you set a breakpoints after you writing the memory register, in case it set again when you check it.

    B.R.

    Sal

  • Well in my case it is still set up during the whole program execution. I have already tried pooling during program execution to avoid some jtag inconveniences and the flag is still set non stop. So I don't know what could be the cause ?

  • Hi Peter,

    How about test with below scenario:

    1. ENABLE LCD

    2. Wait the LCDFRMIFG set

    3.Write LCD the memory register

    4.Disable LCD

    5.Check the interrupt flag

    B.R.

    Sal

  • Hi,

    Okay I will try.

  • Okay, I did something like this

    //Writing data to LCDC memory

    LCDM27 |= 0x80;

    // Turn LCDC module OFF

    LCDCCTL0 &= ~LCDON;

    And the flag is cleared. In debugging mode.

    But now for some reason I did the pooling and the flag is cleared also in free running mode.

    So yes the turning OFF the screen helped and the flag was reset.

    BUT I have noticed now in debugging mode when I will set breakpoint after setting up LCDC without turning it of and writing data to memory this bit is always set but in free run mode it is not set. It is set only when I do the change of clocksource after I set up LCDC. Applies only for free running mode.

    When I do the clock init before I set up LCDC it is not set in free run mode. But it is set during debugging.

    So this bit is set in both cases in debugging mode.

    But in free run when I check that flag with pooling it is only set when I do clock init after setting up clock source l mean all clocks for MCLK SMCLK and ACLK.

    I am checking flags for LCDC with pooling like this :

    if(LCDNOCAPIFG == (LCDCCTL1 & LCDNOCAPIFG) ||
    LCDBLKONIFG == (LCDCCTL1 & LCDBLKONIFG) ||
    LCDBLKOFFIFG == (LCDCCTL1 & LCDBLKOFFIFG)
    || LCDFRMIFG == (LCDCCTL1 & LCDFRMIFG) 
    )
    {

    turnLightOn();


    while(1);

    }

    So can the change of clock configuration after setting up LCDC modul cause this bit remain to be set? And also is it okay that the flag is set always in debugging mode? When LCDC is OFF the flag is reset after configuration but it applies only in that case. 

  • Hi Peter,

    So can the change of clock configuration after setting up LCDC modul cause this bit remain to be set?

    Beacuse the LCD requires the clock from VLOCLK/ACLK, if you change the clock setting after LCD init, it might occur unexpected behavior.

    How about below scenario:

    Init clock -> Init LCD -> Change the clock -> Manually clear the Interrupt flag -> Check the flag status with enable LCD.

    I am not sure, but it worth a try. Anyway, this is not a recommend operation.

    And also is it okay that the flag is set always in debugging mode?

    In the debug mode, even if you set a breakpoint. The MCU clock is still generated, same as the LCD clock. So, when you check the status, you will find the interrupt flag set due to next frame boundary has entried. This is my speculation.

    B.R.

    Sal

  • Hi,

    Okay, I will try.

  • Hi,

    also if I may there was the configuration in the exmamples.

    // Setup LCD_C
    // LCD_FREQ = ACLK/32/4, LCD Mux 4, turn on LCD
    LCDCCTL0 = LCDDIV_31 | LCDPRE_1 | LCD4MUX | LCDON;

    //Charge pump generated internally at 2.96V, external bias (V2-V4) generation
    //Internal reference for charge pump
    LCDCVCTL = LCDCPEN | VLCD_2_96;
    REFCTL0 &= ~REFMSTR;

    LCDCPCTL0 = 0x0000; //Select LCD Segments 20-21
    LCDCPCTL1 = 0x0030; //

    I would like to ask whether it is okay to set LCDCPCTL0  and LCDCPCTL1 when LCDON is already set. I mean there is in the manual note with this but in example it is the oposite so which one is correct? I also tried this configuration and it looks like it works. So may there be any side effects?

  • Hi Peter,

    I agree with manual note. Please refer to the user gudie note.

    So may there be any side effects?

    I am not sure, but it looks have pontential risk here.

    B.R.

    Sal

  • Hi,

    Okay so when should I do the LCD turn on. In the end of configuration? And should I avoid to write to LCD memory register when LCD is on ? There I think there is no note but to be sure .

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