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MSP430FR5989-EP: Caps on unused ESIDVCC or no? Short on board space

Part Number: MSP430FR5989-EP


Tool/software:

Hi TI support,

We're super tight on board space and so only critical parts are making the cut for this board design, but we still need solid performance. My question is about recommended bulk and decoupling caps from section 6.1.1 of the M430FR5989SRGCREP datasheet, page 135. It says the following:

"TI recommends connecting a combination of a 1-μF plus a 100-nF low-ESR ceramic decoupling capacitor to each AVCC, DVCC, and ESIDVCC pin."

We are NOT using the ESI module and so table 3-2 (page 12) recommends tying the unused ESIDVCC pin to DVcc. So without the ESI module in use, do we still need to include the above recommended caps on that ESIDVCC pin?

Need your design input on this please. And ideally, if it's not necessary to have those caps at all, then that would save us on board space, which is great. Thoughts?


Thanks,

Brian

  • Hi Brian,

    Since you are not planning to use the ESI Module and there isn't any special requirements in Table 3-2, I believe you may not need to add a capacitor to ESIDVCC and just connect to the DVCC, in order to save your board space. However, if possible, I still recommend you to perform some testing and evaluation on your application to make sure there are no problems with it.

    Best Regards,
    Peter

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