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MSP430FR6007: MSP430FR6007: LPM3.5 and LPM4.5 Current Too High — Not Reaching 1 µA

Elavarasan Mohan
Prodigy 10 points
Part Number: MSP430FR6007

Tool/software:

Hello,

I'm currently performing a power consumption test on the MSP430FR6007 microcontroller using Code Composer Studio, and I'm seeing higher current readings than expected, especially in LPM3.5 and LPM4.5, compared to the typical values mentioned in the datasheet (~1 µA). Below are the details of my testing procedure and results.

Test 1: LPM0 to LPM4 Power Consumption

Test Code:

#include <msp430.h>
void main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog
__bis_SR_register(GIE); // Global Interrupt Enable
while (1)
{
__bis_SR_register(LPM4_bits | GIE); // Change LPMx_bits for each test
}
}

Measured Results:

Mode Measured Current
LPM0 0.17 mA
LPM1 0.11 mA
LPM2 0.06 mA
LPM3 0.06 mA
LPM4 0.02 mA

These results are generally in line with expectations for LPM0–LPM4.

Test 2: LPM3.5 / LPM4.5 Power Consumption (Initial Attempt)

Test Code:

#include <msp430.h>

void main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog

PM5CTL0 &= ~LOCKLPM5; // Enable GPIO config

PMMCTL0_H = PMMPW_H; // Unlock PMM
PM5CTL0 |= LOCKLPM5; // Re-enable GPIO high-impedance
PMMCTL0_L |= PMMREGOFF; // Request regulator off

__bis_SR_register(LPM4_bits | GIE); // Enter LPM4

__no_operation(); // For debugger breakpoint
}

Measured Results:

Mode Measured Current
LPM3.5 0.45 mA
LPM4.5 0.55 mA

These readings are much higher than the expected ~1 µA, suggesting LPM3.5/4.5 was not properly entered.

 Test 3: Disabled GPIO High-Impedance Mode

In the same code, I commented out or removed the following line:

PM5CTL0 |= LOCKLPM5; // Disabled this line

New Measured Results:

Mode Measured Current
LPM3.5 35 µA
LPM4.5 25 µA

This significantly reduced the current, but it's still far from the datasheet spec of ~1 µA.

 My Questions:

  1. Why does re-enabling high-impedance mode (PM5CTL0 |= LOCKLPM5) result in higher current during LPM3.5/4.5?

  2. Even after disabling LOCKLPM5, why am I still getting 25–35 µA instead of 1 µA?

  3. Is my sequence for entering LPM3.5/LPM4.5 correct?

  4. Are there additional steps needed (e.g., clearing RTC, disabling modules, disconnecting unused IO) to achieve the expected ultra-low power state?

  5. Could external components or board-level leakage be contributing?

Measurement Setup:

  • MCU: MSP430FR6007

  • Supply: 3.3V from external power supply

  • Measurement: Series current via DMM (µA range)

  • External components: EEPROM + BLE module + Touch IC + LCD  (but BLE powered off during test)

  • All GPIOs not used are set to output low before entering LPM

Any guidance to achieve the ~1 µA target for LPM3.5/LPM4.5 would be greatly appreciated.

Thank you,
Elavarasan .M 

  • 0
    TI__Mastermind 25690 points

    Hi Elavarasan,

    Have you been able to test on our launchpads or with the example code?

    LPM 3.5 Example code

    LPM 4.5 Example code

  • 0 in reply to Luke Ledbetter
    Prodigy 10 points

    Hi ,

    Thanks for your Reply,

    We have developed a custom PCB for water flow measurement using the MSP430FR6007 microcontroller. The board is designed with the following features:

    Board Design Summary:

    • Power Supply: 3.6V battery

    • Programming Interface: JTAG pins soldered for flashing firmware

    • Connected Peripherals:

      • LCD Display

      • Capacitive Touch IC (connected to a GPIO pin)

      • EEPROM IC (I²C)

      • BLE Chip

    • Voltage Regulators: Selected based on the MSP430FR6007 datasheet recommended specs

    Power Measurement Test Setup:

    We used this same board to measure power consumption in various Low Power Modes (LPM). Below are the current readings observed:

    Mode Measured Current
    LPM0 0.17 mA
    LPM1 0.11 mA
    LPM2 0.06 mA
    LPM3 0.06 mA
    LPM4 0.02 mA
    LPM4.5 (with LOCKLPM5) High )0.45-55mA
    LPM4.5 (without LOCKLPM5) Low (~25–35 µA)

     Main Issue:

    When testing LPM4.5, we observed:

    • If the line PM5CTL0 &= ~LOCKLPM5; is enabled, the power consumption in LPM4.5 is very high.

    • If that line is commented out, the power drops significantly (closer to expected ultra-low values, like 25–35 µA).

    However, we are not reaching the datasheet value of ~1 µA for LPM4.5, and we would like to understand:

     My Questions:

    1. Why does enabling PM5CTL0 &= ~LOCKLPM5 (i.e., unlocking I/O) cause higher current in LPM4.5 mode?

    2. If we comment out LOCKLPM5, we observe lower power, but then I/O configuration might not be proper — is that the expected behavior?

    3. In our board setup (with LCD, BLE, EEPROM), are there any recommended hardware or software steps to ensure reaching the 1 µA target in LPM4.5?

    4. What is the proper sequence of entering LPM4.5 with minimal leakage through GPIOs and peripherals?

    5. Should all GPIOs be driven low and set as outputs before entering LPM4.5?

     Objective:

    We would like to achieve <1 µA current consumption in LPM4.5, as per the datasheet, using our current PCB design. Any optimization tips or clarification from the TI team would be greatly appreciated.

    Thank you,
    Elavarasan .M

  • 0 in reply to Elavarasan Mohan
    TI__Mastermind 25690 points

    Hi Elavarasan,

    Were you able to test the example codes I linked in the post above?

    If there is leakage or floating IOs in the device then unlocking the IOs can create a leakage path that wasn't originally present when locked. I do recommend setting the IO state before entering LPM, this is to prevent floating nodes. With the floating node if voltage is observed you could put a transistor in a state where is is reading both high and low which causes a leakage path to appear through the pin. This is a common thing in all electronics and why you need to set high and low at specified voltages.

  • 0
    Guru 24515 points
    Elavarasan Mohan said:
    All GPIOs not used are set to output low before entering LPM

    The guide says: "For LPM4.5 set all ports to general-purpose I/Os".

    There is no reason to set LOCKLPM5 as it gets set automatically when entering a x.5 mode. Actually, the guide says it can't be set by software.

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