MSP430I2021: Considerations of the differential input's protection and buffering.

Emmanouil Tsachalidis

Part Number: MSP430I2021

Tool/software:

Hi everyone,

I am designing a fully isolated (galvanically) AFE with the MSP430i2021 MCU.

My target input system impedance is at least 1-2M for general V/I measurements. If un-buffered, the MSP430i2021 input is prefixed with a high impedance resistor-series network like the one below:

The RATT could range from a few kΩ up to 1-2MΩ to make measurements of up to 1kV possible if i take into account the max Rdrop per Resistor, power dissipation etc.

The CFLT could form a simple 1st order filter of a few kHZ or so (depends on RATT) since i am planning of measuring DC and 50/60Hz AC signals.

Galvanic isolation is applied by using a power transformer to form a DC (rectified) then well filtered with 10nF/100nF/1uF/10uF X7R MLCCs and finally LDO regulated 3V rail. Data is transmitted / received by using high speed optocouplers.

1) I would like to ask if this simple schematic is by itself ok to use in a production system. What else could be used to improve the current schematic in terms of dynamic range? I am currently using optocouplers to switch between various R in place of RATT in order to form scales from 1kV down to 1V.

2) ESD protection is not embedded because the slightest leakage of a few tenths nA would form an attenuation network with the 220k resistors. What else could i do to protect the inputs?

3) Would connecting a thermocouple right at the inputs of the A0+/- be a good practice (or maybe through 1-2KΩ resistors) in order to measure temperature? What about ESD protection in this case?

Thanks in advance.

Manos

3 months ago

0 Emmanouil Tsachalidis 3 months ago

Prodigy 50 points

I am adding a Tina simulation schematic for your reference:

The voltage values for every gain value are given in the datasheet as max values in order for the indicated performance to be valid.

0 Eason Zhou 3 months ago

TI__Mastermind 39775 points

1) For protection circuit, you can refer to the app note. Please rememeber that even the ESD will involve some leakage current, as we will do the calibration, that is acceptable.

2) Another thing is that your circuit my above our IO limitation. The Vdifference is in range, but the Vcommon will be much much higher than MCU VDD. Normally, we will use IN- as the GND of MCU.

0 Emmanouil Tsachalidis 3 months ago in reply to Eason Zhou

Prodigy 50 points

Dear Eason,

The circuitry's power rail +3V is isolated from anything else. The AFE of the MSP430i2XX will be exposed to the difference of the two input ends. I am not sure i understand your comment about out of bounds common mode voltage. Can you explain?

Thanks

Manos