baude rate not correct

Enzo Ternavasio said:

Working with MSP430AFE253 i have first used DCO to produce 12Mhz (with calibrated setting) but the value is not precise and i cannot comunicate with UART at 2Mhz, i get many errors.

Then i used a 12Mhz crystal but for my surprise even now baude rate is too approximate.

......

I usually go with UART at higher speed with no problems, with others micro. Something i'm doing wrong.

Enzo

 Hi Enzo, please reword and post more details of what is wrong.

 UART @2MHz you are referring about is uart clock or a 2MBps bit rate? Which type of error you got?

 How you measured bit rate and approximate to what? I am dubious about an xtal oscillator still produce different frequency, have you selected correct clock source?

 Other MSP series micro or other brand?

 Regards

Hi Enzo,

FYI the UART is probably limited to 1 Mbaud.  I don't know your specific MSP430, but all the ones I've used have that limit.

Jeff

The maximum USART baud rate is one-third the UART source clock frequency BRCLK.

Based on that and the fact that the USART is specified for up to 8MHz input clock frequency, it should be possible to get up to 2.6 Mbps out of it. So if the 12MHz crystal frequency is divided by 2, then fed to the USART (6MHz, so in spec) and the UCxBR are set to divide the clock by 3, it might work.

I never tried that though.

(the eUSCI module found in the FR5xx devices is specified up to 5Mbps, but thats of course not an option if the metering capability of the AFE is needed here) 

Dear friends i try to give more details about this strange behavior.

For testing i made the micro transmit continously a data. Data is 0x00 in 8 bit format and 1 stop bit. It correspond to a transition 1->0 and remains low for 9 bit time. At 2Mhz of baude rate it is rectangle of 4.5microseconds.

I measure around 4.7 microsec and this gives serial errors.

This is almost indipendent from clock source; i tried with internal DCO, external crystal, external oscillator (even if at a slightly higher frequency than permitted, 16.384MHz, see pg 16 and 27 of MSP430AFE253 data sheet).

The test software comes from "Tested_IAR_Code_Examples" downloaded.

Another strange  thing is that sending 0xFF you can only see the start bit. This is exat! It last exactly 1/2000000 seconds. If you send 0xFE, the data bit is wrong, it lasts more.

This is software for crystal (and commented for oscillator):

#include "msp430afe253.h"

volatile unsigned char attendi;

void main(void)
{
  volatile unsigned int i;
 
  WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT
 
  DCOCTL=CALDCO_12MHZ;
  BCSCTL1=CALBC1_12MHZ;
 
 //Swap to oscillator at 16.384MHz only for SMCLK
 /* BCSCTL1&=~XT2OFF;
  BCSCTL2|=SELM_0;   //MCLK Source: DC0
 BCSCTL2|=DIVM_0;   //MCLK/1 - not decreased
   BCSCTL2|=SELS;    //SMCLK Source: XT2CLK
    BCSCTL2|=DIVS_1;   //devider by 2 for SMCLK at 8.192MHz
   
    BCSCTL3|=XT2S_3;   //digital ext clock source  */

//Swap to crystal at 12MHz only for SMCLK
  BCSCTL1&=~XT2OFF;
  BCSCTL2|=SELM_0;   //MCLK Source: DC0
 BCSCTL2|=DIVM_0;   //MCLK/1 - not decreased
   BCSCTL2|=SELS;    //SMCLK Source: XT2CLK
    BCSCTL2|=DIVS_1;   //devider by 2 for SMCLK at 6MHz
   
    BCSCTL3|=XT2S_2;   //crystal source
    
  P1SEL |= BIT3+BIT4;                       // P1.3,1.4 = USART0 TXD/RXD
  //does not exit this loop:
  do
  {
      IFG1 &= ~OFIFG;                       // Clear OSCFault flag
      for (i = 0x47FF; i > 0; i--);         // Time for flag to set
  }
  while ((IFG1 & OFIFG));                   // OSCFault flag still set?

  ME1 |= UTXE0 + URXE0;                     // Enable USART0 TXD/RXD
  U0CTL |= CHAR;                            // 8-bit character
  U0TCTL |= SSEL1;                          // UCLK= SMCLK
  U0BR0 = 4;                                // 8.192MHz/4 = 2MHz  about
  U0BR1 = 0x00;                             // 2MHz 
  U0CTL &= ~SWRST;                          // Initialize USART state machine
  //IE1 |= URXIE0;                            // Enable USART0 RX interrupt
  P1SEL2 |= BIT0;                           // Set SMCLK at P1.0
 
 
  while(1)
  {
   while (!(IFG1 & UTXIFG0));           // USART0 TX buffer ready?
   TXBUF0=0x0;
  }
}

Enzo Ternavasio said:

For testing i made the micro transmit continously a data. Data is 0x00 in 8 bit format and 1 stop bit. It correspond to a transition 1->0 and remains low for 9 bit time. At 2Mhz of baude rate it is rectangle of 4.5microseconds.

While the maximum clock rate for the USART in the AFE253 is 8MHz, the maximum baudrate is 1MHz. The USART has an input deglitch time of up to 500ns, so 2MHz signals probably won't pass the input deglitch filter at all.
The datasheet of the AFE does not explicitely state the 1MHz limit, but others with USART do. Also, it makes no sense using a baudrate that is higher than what can be received due to deglitching.

However, it does not explain why you see 0.2µs = 4,4% timing error on the output.

If you output SMCLK to a port pin and check it, what is it exactly? Your tx low output should 36 times this value. Also (unlikely but did happen) the timing of your measuring equipment might be off, and the MSP output is okay. :)

If you measure SMCLK on port P1.0 it is always correct, even when you change software settings.

I have found that the error some times it desappear, even if rarely. It seems to be a hardware start problem, but the problem is the same on the T.I. eval board.

At baude rate of 1 Mhz the error is less but stil present. At 9600 it has no importance , of course. It is as if  data bit are produced with a wrong time, they last always a little more.

The error is not repetitive, it changes a little. Is it a bug of  MSP430AFE253?

I'm waiting a TI response.

Enzo

 

Enzo Ternavasio said:

The error is not repetitive, it changes a little. Is it a bug of  MSP430AFE253?

 Hi Enzo, I don't own a AFE253 so I cannot check what happen in your setup, please check errata http://www.ti.com/lit/er/slaz073b/slaz073b.pdf, check on page 7 which die revision is in your parts.

 On silicon errata no mention of this strange behavior is mentioned.

 Baud rate or better Bit Rate (same on serial lines) can change if modulator is active, from your code sketch some register remain in reset state and bit not set, so please try in first change |= clause with a simple assignment = sign

ME1 |= UTXE0 + URXE0;                     // Enable USART0 TXD/RXD
  U0CTL |= CHAR;                            // 8-bit character
  U0TCTL |= SSEL1;                          // UCLK= SMCLK
  U0BR0 = 4;                                // 8.192MHz/4 = 2MHz  about
  U0BR1 = 0x00;                             // 2MHz 
  U0CTL &= ~SWRST;                          // Initialize USART state machine
  //IE1 |= URXIE0;                            // Enable USART0 RX interrupt
  P1SEL2 |= BIT0;  

set a break point after transmit then read and post content of all these register from USART yellow marked can alter bit rate.

 Regards

 Roberto

-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Control registers:

UCA0CTL0
UCA0CTL1

Baud rate control register 0

UCA0BR0

baud rate control register 1

UCA0BR1

modulation control register

UCA0MCTL
status register

UCA0STAT
receive buffer register

UCA0RXBUF
transmit buffer register

UCA0TXBUF
Auto baud control register

UCA0ABCTL
IrDA transmit control register

UCA0IRTCTL
IrDA receive control register

UCA0IRRCTL

Hy Roberto and happy new year,

datasheet of MSP430AFE223 doesn't report any advice about deglitching and oversampling. The only mention is on pg. 31 and set the spread of deglitching time from 150nsec to 500nsec, active only for data transmitted.

On family user's guide deglich is related to USCI that is not on my micro. In fact i always find a lot confusing consulting family user's guide.

Tests on this chip can be invalidated by another. That's why i change the speed to 1Mhz. On thsi project it is not mandatory very high speed.

I have opened another question about SPI, if you take a look.

Enzo

 Hi Enzo, Happy new year again, I read again  datasheet of part, no mention of how deglitching is working, so can be delay on opening latch or a majority vote from clock oversampling. Detail on datasheet is disappearing from time to time and every information drop.

I also noticed error on clock pin input circuitry diagram, deglitching appear on both p2.x pin xtal oscillator and both have output inside the chip, so xt out from this collide with deglitcher out...

  I see your new post later when i come back.

 Regards

 Roberto

Enzo Ternavasio said:

In fact i always find a lot confusing consulting family user's guide.

The users guide is the encyclopedia whiel the daatsheet is the descriptive text. You read the datasheet and lookup the modules in the users guide. And then you check the errata sheet for "hardware typos". It's that simple - if you know it.

Roberto Romano said:

I also noticed error on clock pin input circuitry diagram, deglitching appear on both p2.x pin xtal oscillator and both have output inside the chip, so xt out from this collide with deglitcher out...

Actually a copy/paste error, sicne both diagrams contains the very same XTAL circuitry - someone just forgot to mirror the circuitry. P2.6 is the correct one.
I've been puzzled too at first, and I already reported this very same issue for the G2x13/2x53 datasheet (amongst a long list of other things).