Part Number: LP-MSPM0G3507
Other Parts Discussed in Thread: MSPM0G3507, MSPM0G1507, SYSCONFIG
Tool/software:
Hi TI Team,
I am currently working on a project that involves migrating from the MSPM0G3507 (60-pin) to the MSPM0G1507 (48-pin) device. I have a question regarding GPIO interrupt configuration and pin mapping during this process.
In my current code (developed for the G3507), I use the following definitions for ADC pin configuration:
I’ve checked the device-specific header files (mspm0g350x.h and mspm0g150x.h) and noticed that these definitions are identical in both. However, since the G1507 has fewer pins (48 pins), I’m unsure whether these mappings remain valid, especially regarding GPIO interrupt capabilities.
My questions are:
-
Do the same DIO numbers and IOMUX definitions (e.g.,
DIO26,IOMUX_PINCM59) remain applicable and functional when switching to the 48-pin G1507 device? -
If not, what is the recommended way to remap or reconfigure these definitions for the G1507?
-
More generally, how should I adjust my GPIO and interrupt configurations when migrating to a device with a reduced pin count?
Any guidance or reference examples would be greatly appreciated.
Thank you in advance!
Best regards,
Pakho



