Number of external interrupts MSP430F5437 provides and question on difference between msp430f5437.h vs. io430f5437.h

You can enable any port pin with interrupt capability (P1 and P2 on the F5437) to cause an interrupt. That is you have 16 pins to choose from freely (maybe the interrupt priority might be important - it is fixed like it's stated in the datasheet). You can also select if you want to trigger on rising or falling edges (PxIES) independently for each pin.

You are correct that there is only one interrupt vector - so any pin from P1 will trigger the P1 interrupt, but you can check the flags (using P1IV) to see which pin actually caused the interrupt and take appropriate actions. So there should be not much trouble handling four external interrupts. Have a good read of the family user guide chapter 11, it covers all the details on how to handle and configure the ports.

As for the header files - I think it's best to use the one provided with the actual tools you are using (that is the one from IAR) because there might be something different on how the compiler/linker handles the files (and definitions of registers) and thus might cause trouble if the header is different than expected. But so far I've only used CCS and can't really tell if there is trouble ahead if you use the TI header files.

Karen Shi said:

On msp430f5437.h, it doesn't provide port I/O pin definitions, only define ports, such as P1OUT.

I don't know what you exactly mean - did you expect something like P1.1OUT, a single bit for each pin? That is not available and you will have to work with bit operations and masks to address each pin on the port like P1OUT |= BIT2 | BIT0; to set pin 0 and pin 2 to high.

In addition to the interrupts caused by port 1+2 port pins, you can alternatively use teh CCR units of the timers. Each CCR unit can trigger an interrup ton rising falling or both edges, a tthe same time copying the current timer value into the CCR register. Depending on the port mapping, the CCR units may be on teh same physical pins as P1 or P2 or on different pins, giving additional interrupt sources.
The DMA controller can also be abused as interrupt source, the DMAEN input triggering a (dummy) DMA transfer followed by a DMA interrupt. If in dire need, you can even abuse teh XT1/XT2 inputs for interrupts (setting up a timer for capture interrupt on TAR=1, sourcing the timer from the clock sourced by the XT1/XT2 input in bypass mode). However, you'll need to 'rearm' the interrupt after each trigger by resetting the timer. This is useful when the CCR pins are on P1/P2. Or you 'arm' the tiemr by setting it to 65535 and use the overflow interrupt. This works in addition to the CCR units.

Finally, you can use the USCI modules in 3wire SPI slave mode to trigger an interrupt every 8th pulse (by sourcing the serial clock).

On some MSPs, the comparator inputs can also be used for generating interrupts.

And of course you can use port pin polling, if the signals are slow (we use it for detecting and counting 'S0' pulses, which last at least 20ms)