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MSP430F67791A: UniFlash Flash Write Check Failed on Information Memory

Part Number: MSP430F67791A
Other Parts Discussed in Thread: UNIFLASH, MSP-FET

Tool/software:

When I try to write data to the Information Memory of the MSP430F67791A using UniFlash's BSL (UART mode), I get a flash write error.

Note: when I write data to the Information Memory using the JTAG interface (not the BSL), there are no errors and the memory is written to successfully.

Tools/Equipment Used

  • UniFlash version(s): 8.1.1.4146 and 9.2.0.5300 (older and the also the latest version show the same issue)
  • MSP-FET debugger/programmer
  • MSP430F67791A

Description

The MSP430F67791A has 512 bytes of Information Memory, located at address 0x1800.

This memory is split into 4 segments, each 128 bytes in size.

Note: each segment must be erased before it is written to.

I use a TI-TXT file that contains data to write to the Information memory (0x1800 - 0x19FF).

The write to the first segment (128 bytes) works ok, but writing to subsequent segments fails.

UniFlash Settings

UART Data

I "peeked" the BSL UART to see the message data and I decoded the transfer to/from the device using the MSP430 Flash Devices Bootloader (BSL) document, which shows the commands and responses as follows:

[FROM MSP430]
00                                ACK

[TO MSP430]
80                                Header
21 00                             33 bytes
11                                RX Password
E0 C0 DE C0 FF FF FF FF ...       32 byte password
33 68                             Checksum

[FROM MSP430]
00                                ACK
80                                Header
02 00                             2 bytes
3B                                BSL Core Response (message)
00                                Operation Successful
60 C4                             Checksum

[TO MSP430]
80                                Header
01 00                             1 byte
19                                TX BSL Version
E8 62                             Checksum

[FROM MSP430]
00                                ACK
80                                Header
05 00                             5 bytes
3A                                BSL Core Response
00 07 05 04                       BSL Version Number
AD 61                             Checksum

[TO MSP430]
80                                Header
04 00                             4 bytes
12                                Erase Segment
00 18 00                          Address = 0x001800
D5 F8                             Checksum

[FROM MSP430]
00                                ACK
80                                Header
02 00                             2 bytes
3B                                BSL Core Response (message)
00                                Operation Successful
60 C4                             Checksum

[TO MSP430]
80                                Header
84 00                             132 bytes
10                                RX Data Block
00 18 00                          Address = 0x001800
54 9B 05 01 18 18 00 00 ...       128 bytes of data
88 C7                             Checksum

[FROM MSP430]
00                                ACK
80                                Header
02 00                             2 bytes
3B                                BSL Core Response (message)
00                                Operation Successful (128 bytes programmed at 0x1800)
60 C4                             Checksum

[TO MSP430]
80                                Header
04 01                             260 bytes
10                                RX Data Block
00 19 00                          Address = 0x001900
55 9B 04 01 14 19 00 00 ...       128 bytes of data
55 9B 04 01 A4 19 00 00 ...       128 bytes of data
D6 CE                             Checksum

[FROM MSP430]
00                                ACK
80                                Header
02 00                             2 bytes
3B                                BSL Core Response (message)
01                                Flash Write Check Failed (CRC error).
41 D4                             Checksum

Memory Read to Verify

I used UniFlash to read-back the data at location 0x1800 - 0x19FF and could see that the 1st 128-byte segment was written correctly, but subsequent segments were not.

I also used a test pattern to initialize the 512-byte Information Memory so I could more clearly see which bytes were not written to by the Bootloader.

The results showed that the 3 subsequent 128-byte segments were not erased before the write was attempted e.g., bits already set to zero using the test pattern were not affected, whereas bits set to 1 could be affected by the write access (this is expected, noting that the erased state of the flash is '1').

Conclusion

I believe that UniFlash is only sending one "erase segment" command (for the address at 0x1800) and therefore, will only erase the first 128 bytes at address 0x1800.

Therefore, when it tries to write/program data at subsequent segments e.g., at 0x1880, 0x1900 and 0x1980, without erasing those segment(s), it will fail to write the data to those next segments.

I think that this is why it fails to program the data at 0x1900.

I believe there needs to be an "erase" command for each 128-byte segment in Information Memory that UniFlash writes to, and that does not seem to be happening.

Hopefully my post all makes sense.

Thanks

  • Your capture of data shows only the first segment (D) being erased.

    It also shows you trying to write to segment A. That is protected by the LOCKA bit which might cause trouble here as well.

    I checked the chipinfo database (as included with the mspdebug source) and it correctly describes the information memory segmentation.

  • Hi David,

    Thank you for the response.

    I have tried various tests, and these show that even without attempting a write to segment A at 0x1980 (which, as you say is protected by a separate lock), the problem still exists. For example, when attempting to write to addresses 0x1800 (128 bytes) and 0x1900 (128 bytes), the write to 0x1900 fails.

    As per Table 6-9 in the MSP430F67791A datasheet, these are segments D and B, respectively:

    I believe the root cause of this issue is that only the 1st segment specified in the TI-TXT file is erased for the Information Memory, not the subsequent segments. This theory matches with the commands that I see on the UART link and with the resulting read of memory after the write attempt, i.e., only a single erase command is sent, in this case for address 0x1800. No subsequent erase commands are sent - in this case, no erase command is sent for the segment at 0x1900 before trying to write data to that segment, resulting in a failed write.

    Best Regards,

    Eric

  • I've performed some more testing that also shows unexpected behaviour from UniFlash when in BSL (Bootloader - UART) mode:

    • I used UniFlash in JTAG mode (always seems to work ok) to program a test application in Program Flash and also test values in the Information Memory (all 512 bytes).
    • I created a TI-TXT file that contained new values for Segment B (0x1900, 128 bytes) and used UniFlash in BSL mode to program Segment B.
    • I tried this using 2 separate test options:
      • "Erase necessary segments only"
      • "Erase Information Memory"
    • Each test option used the same Password file (the same application was in the program flash for each test).
    • Each test option used the same Information Memory file (128 bytes at 0x1900), containing the new data to program.

    Results (Erase necessary segments only)

    The BSL UART commands show that UniFlash sent a command to "Erase Segment" with address 0xFFE0, but that's the password address, which is very strange. The MSP430 responds with "Operation Successful". Then UniFlash sent a command to "Erase Segment" with address 0x1900 (expected for segment B), and the MSP430 also responds with "Operation Successful".

    After writing the data to address 0x1900, the trace of the UART shows that UniFlash checks the CRC of the password area "segment" (this is strange) and also the CRC of the Information Memory B segment (this is expected). The CRC test of the password "segment" failed and the CRC test of Segment B passed.

    See below for details of the UART data showing the BSL commands and responses:

    [FROM MSP430]
    00                                 ACK

    [TO MSP430]
    80
    21 00
    11                                 RX password
    E0 C0 DE C0 FF FF FF FF ...        32 byte password
    33 68

    [FROM MSP430]
    00                                 ACK
    80
    02 00
    3B                                 BSL Core Response (message)
    00                                 Operation Successful
    60 C4

    [TO MSP430]
    80
    01 00
    19                                 TX BSL Version
    E8 62

    [FROM MSP430]
    00
    80
    05 00
    3A                                 BSL Core Response
    00 07 05 04                        BSL Version Number
    AD 61

    [TO MSP430]
    80
    04 00
    12                                 Erase Segment (L, M, H)
    E0 FF 00                           Address = 0x00FFE0 - why erase password area???
    C1 D1

    [FROM MSP430]
    00
    80
    02 00
    3B                                 BSL Core Response (message)
    00                                 Operation Successful
    60 C4

    [TO MSP430]
    80
    04 00
    12                                 Erase Segment (L, M, H)
    00 19 00                           Address = 0x001900 (correct)
    E4 CB

    [FROM MSP430]
    00
    80
    02 00
    3B                                 BSL Core Response (message)
    00                                 Operation Successful
    60 C4

    [TO MSP430]
    80
    84 00
    10                                 RX Data Block
    00 19 00                           Address = 0x001900
    00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F
    8F 6B

    [FROM MSP430]
    00
    80
    02 00
    3B                                 BSL Core Response (message)
    00                                 Operation Successful
    60 C4

    [TO MSP430]
    80
    06 00
    16                                 CRC Check
    E0 FF 00                           Address = 0x00FFE0 - why do this???
    20 00                              0x0020 (32 bytes)
    3C EF

    [FROM MSP430]
    00
    80
    03 00
    3A                                 BSL Core Response (CRC Value)
    F8 75                              CRC = 0x75F8 (not as expected, so UniFlash fails)
    A2 7A

    [TO MSP430]
    80
    06 00
    16                                 CRC Check
    00 19 00                           Address = 0x001900
    80 00                              0x0080 (128 bytes)
    3D 6A

    [FROM MSP430]
    00
    80
    03 00
    3A                                 BSL Core Response (CRC Value)
    00 18                              CRC = 0x1800
    C1 5D

    Conclusion (Erase necessary segments only)

    The UniFlash operation fails. Although it correctly programs Segment B when using the option "Erase necessary segments only", it fails the overall operation because it has decided to send a command to "Erase Segment" at the password address (0xFFE0), and perform a CRC test at this address too, which is quite strange. The area that is erased is the segment/sector that the provided address is "within", in this case the entire segment/sector that address 0xFFE0 resides within. In any case, that "Erase Segment" command seems wrong to me?

    Results (Erase Information Memory)

    The BSL UART commands show that UniFlash sent a command to "Erase Segment" with address 0x1800, but that's not the correct address for the provided Information Memory segment (0x1900, 128 bytes). This command will only erase the segment at 0x1800 (128-bytes), and not the segment in question (0x1900). Therefore, when the write check is performed, it fails, as per my original post.

    See below for details of the UART data showing the BSL commands and responses:

    [FROM MSP430]
    00                                 ACK

    [TO MSP430]
    80
    21 00
    11                                 RX password
    E0 C0 DE C0 FF FF FF FF ...        32 byte password
    33 68

    [FROM MSP430]
    00                                 ACK
    80
    02 00
    3B                                 BSL Core Response (message)
    00                                 Operation Successful
    60 C4

    [TO MSP430]
    80
    01 00
    19                                 TX BSL Version
    E8 62

    [FROM MSP430]
    00
    80
    05 00
    3A                                 BSL Core Response
    00 07 05 04                        BSL Version Number
    AD 61

    [TO MSP430]
    80
    04 00
    12                                 Erase Segment (L, M, H)
    00 18 00                           Address = 0x001800 (should be 0x1900)
    D5 F8

    [FROM MSP430]
    00
    80
    02 00
    3B                                 BSL Core Response (message)
    00                                 Operation Successful
    60 C4

    [TO MSP430]
    80
    84 00
    10                                RX Data Block
    00 19 00                          Address = 0x001900
    00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F
    8F 6B

    [FROM MSP430]
    00
    80
    02 00
    3B                                BSL Core Response (message)
    01                                Flash write check failed
    41 D4

    Conclusion (Erase Information Memory)

    The UniFlash operation fails. This is because the "Erase Segment" command is only provided for the segment at 0x1800, and not the segment at 0x1900. This can be seen if we read the entire Information Memory at 0x1800 (512 bytes), as shown below:

    The picture above shows:

    • Left hand side = before BSL program operation
      • The originally programmed Information Memory at 0x1800 (512 bytes), using test values.
    • Right hand side = after BSL program operation
      • The segment at 0x1800 has been erased
      • The segment at 0x1900 shows an attempt to re-program the data, but it clearly fails because the segment was not erased

     

    Overall Conclusion

    Using the "Erase necessary segments only" option in UniFlash when programming an Information Memory segment using BSL mode actually programs the required segment, but fails overall because the Program Flash segment that contains the password data is also erased (which is clearly incorrect, in my opinion).

    Using the "Erase Information Memory" option in UniFlash when programming an Information Memory segment using BSL mode would probably only ever pass if the first segment in memory at 0x1800 (128 bytes) was programmed (Segment D) because only one "Erase Segment" command is sent, for address 0x1800.

    Hopefully this additional information will help TI to investigate and analyze this issue further.

    Or perhaps I've missed something in the setup or usage or UniFlash that would solve our problem?

    Best Regards,

    Eric

  • I also tried writing to addresses 0x1880 (segment C) and 0x1900 (segment B) using the "Erase necessary segments only" option. The result was that the password area was again erased i.e., "Erase segment" with address 0xFFE0, and although an "Erase Segment" command was sent for the first of the Information Memory segments (0x1880) and the write passed, because the second Information Memory segment (0x1900) was not erased, the write to that area failed.

    So for this example test case:

    • The Program Flash segment/sector that address 0xFFE0 is within should not have been provided with an "Erase Segment" command.
    • The second Information Memory segment that was written to (0x1900) was not provided with an "Erase Segment" command and therefore the write command failed.
  • Hi,

    Thanks for showing the detailed test results. 

    So, for my understanding, it should send command to erase all 4 sectors of the information memory instead of only send one command when using "Erase Information Memory" mode. 

    I will move this issue to Uniflash tool team and check if they have any comments on this topic. 

    Best regards,

    Cash Hao

  • Hi Cash,

    Thanks for your response.

    Yes, I believe that's the root cause of the issue that I have seen.

    There are 4 segments of Information Memory in that particular microcontroller, and if one of those segments needs to be updated/written to, then that segment needs to be erased first before it is written to. And that does not seem to be happening - at least not all the segments that I have tested.

    Best Regards,

    Eric

  • Hi Cash,

    Do you know if there have been any updates from the UniFlash tool team on this topic?

    Best Regards,

    Eric

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