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MSP430FR2476: MSP430FR2476 – ADC measurement in LPM3 using MODOSC or ACLK

burak ozkan
Prodigy 30 points
Part Number: MSP430FR2476


Tool/software:

Hello,

I am using the MSP430FR2476 microcontroller and would like to perform ADC measurements while in LPM3 (deep sleep) mode.
According to the MSP430FR2xx/4xx Family User’s Guide (SLAU445I), MODOSC is shown as disabled in LPM3.
However, when I configure the ADC module to use MODOSC as the clock source, the ADC conversion completes successfully even when the device is in deep sleep (LPM3).

I would like to confirm a few points regarding this behavior:

  1. Does this situation cause any undefined behavior, or is it expected that the ADC module temporarily enables MODOSC during conversion?

  2. If this operation is supported, do I need any additional configuration (e.g., specific bit settings, reference configuration, etc.) to ensure correct operation?

  3. Could you please share an example code snippet demonstrating ADC measurement in LPM3 (deep sleep) mode using MODOSC as the ADC clock source?

Device: MSP430FR2476
Mode: LPM3
ADC clock source: MODOSC

Could you also clarify whether this behavior is officially supported and what the recommended configuration is?

If using MODOSC in this mode is not supported, could you please share an example code snippet showing how to perform an ADC measurement using ACLK as the clock source in LPM3?

  • +1
    Guru 100235 points

    MODOSC is switched on  (if requested by ADCSSEL=0) by the ADC and then switched off when the ADC is finished. This is described in User Guide (SLAU445I) Sec 3.2.15.1. This is considered a low-power feature: The MODOSC is (presumably) higher-power than ACLK but is quite fast, so the operation finishes quickly.

    Example msp430fr267x_ADC12_11.c demonstrates this (it sets ADCSSEL=0 by omission):

    https://dev.ti.com/tirex/explore/node?node=A__AE6ZjPGFNmcL5vCm9P2MCQ__msp430ware__IOGqZri__LATEST

    -------

    There are two somewhat unusual cases where ACLK might be preferred:

    1) If your sample/hold time is Very long (very high source impedance), that time dominates over the 13-clock conversion time. Sample/hold time is wall-clock time (not ticks) so in this case it might be better to use ACLK.

    2) For the particular configuration of CONSEQ=1 or =3 with MSC=0 (sequence triggered single-step, i.e. fairly slow) my finding (here) was that the ADC clock stays on between steps in the sequence [this is the same as ADC12_B Erratum ADC65, but I don't see it mentioned in the FR2476 Errata (SLAZ725B)]. for this case  you might want the lower-powered clock (ACLK).

    Most applications don't encounter (1) or (2), so the general recommendation is to use MODOSC.

    Once I get to a certain level of detail, I usually build a little spreadsheet to model the behavior for my particular application.

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