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MSP430F5342: powerup reset circuitry

Part Number: MSP430F5342

I have a Xilinx demoboard that uses the MSP430F5342 as a system controller. On perhaps 1 out of 10 powerups it looks like the MSP is not resetting properly. There is a simple RC + SN74LVC1G08DCKR buffer driving the NMI/RST_B line, using 47.5K and 2.2nF tied to the 3.3V rail. The 3.3V has a risetime of several milliseconds, and powers the MPS, the buffer, and the RC; I'm guessing that the RC timeconstant is too short for milliseconds of risetime.

I'm thinking of bypassing the buffer (since it's not a schmitt trigger) and connecting a slower RC directly to the RST_B pin. Does the MSP have a maximum RC that can be applied to this pin?

 

 

  • The MSP430 has internal power up reset circuits and does not depend on the external pin for that. 

    Driving the reset pin with an active device is not something discussed in the documentation. Probably because it isn't compatible with JTAG/Spy-Bi-Wire programming use of that pin.

  • Hi Mike,

    See the information in the UG:

    On perhaps 1 out of 10 powerups it looks like the MSP is not resetting properly.

    What does you mean not reset properly, MCU not reset, or MCU program issues, or MCU behavior abnormal?

    I suggest you can capture the NRST and VCC signal to do further analysis.

    B.R.

    Sal

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