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MSP430F5310: About GPIO Direction Register Settings

Ozawa Takeo
Prodigy 30 points

Part Number: MSP430F5310

Hi,

I have a question regarding the GPIO direction register settings for the MSP430F5310.
Even when my software writes to the P1DIR register to set P1DIR0 to 1, the bit sometimes remains 0 and does not update as expected.
Under what conditions would writes to P1DIR not take effect?
It would be very helpful if you could list the possible conditions.

Thanks and regards,
Takeo

  • 0
    TI__Expert 6871 points

    Hi Takeo,

    From the user's guide:

    To resolve this, you will need to clear the bit like so before setting the direction:

    PM5CTL0 &= ~LOCKLPM5;

    Furthermore, some other things that could result in the bit not being updated as expected:

    • If peripheral function is selected, direction may be ignored (Timer, UART, etc.)
    • Compiler optimization

    Best,

    Owen

  • 0 in reply to Owen Li
    Prodigy 30 points

    Hi Owen,

    Thank you very much for your clear explanation and for quoting the user's guide.
    It was very helpful to see the relevant section explicitly referenced.

    I have one follow-up question regarding the statement in the user’s guide that:
    "All other port configuration register settings such as PxDIR, PxREN, PxOUT, PxDS, PxIES, and PxIE contents are lost."
    When the manual says that the register contents are “lost” after entering LPMx.5, does this mean that those registers are reset to their default initial values upon wake-up, or do they become undefined/indeterminate?

    Thank you again for your valuable support.

    Best regards,
    Takeo

  • +1 in reply to Ozawa Takeo
    TI__Expert 6871 points

    Hi Takeo,

    Ozawa Takeo said:
    All other port configuration register settings such as PxDIR, PxREN, PxOUT, PxDS, PxIES, and PxIE contents are lost.

    This means the values are reverted back to their default values.

    Best,

    Owen

  • +1 in reply to Ozawa Takeo
    Guru 25525 points

    See 1.2 in the guide where it states that a wakeup from a .5 mode is a BOR. The decoder for the reset state of device registers is in the preface.

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