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MSP430FR5969: Programming MSP430FR5969 via BSL

Part Number: MSP430FR5969

I am designing a board with three MSP430FR5969 all in seperate power domains on it that I am trying to program.   Obviously I will have to buffer signals across the power domains.  I have JTAG signals run to the board via LVDS differential signs (TDI, TMS, TCK, nTRST, TDO, + a switched 3v3).  I also have an LVDS SPI bus (CLK, SIMO, SOMI, CSn) also run via LVDS.  There is a mux which decides which MCU can drive the TDO line  with the rest of the MCUs being ignored.  The inputs are applied in parallel to the three MSP430's.   I want the option to be able to reprogram the three MSP430's one at a time (or all at once, but I think one at a time).  My best solution seem to be to use the BSL.  Question 1:  SLAU550ab claims that programming mode can be entered via command, but numerous answers on this forum say this is not true and require the toggling of RST and TEST pins?  Is that cability simply specific to the FRAM parts, or some specific case I am missing (or just plain wrong?  I plan on connecting the SPI signals to UCA0TXD, UCA0RXD,UCA0STE, UCA0CLK. After invocation of the BSL the TLV should set the UCA0 as the UART peripheral and allow UART comms on the SPI lines (assuming my upstream system swaps protocols)?  Only the MCU being programmed would be allowed to talk back to the programmer by the mux and the other two MCUs would have to ignore the UART signals on their spi inputs.  Anything I am missing?

If there is a better solution to this programming jam I am all ears.  I have read that daisy chaining the MSP430 for JTAG programming is out and  I am using all three of the built in serial outputs for other things besides.

 

 

  • If you are looking for simple solution (from software side), then BSL is the right choice, but...

    SBW use 2 less wires (per one target device), and give your SBW master full control over slaves. Not only during flashing, but master also can anytime exchange data with normal (released) running slaves by using JTAG mailbox system (with all slave device peripherals free). There is no any JTAG advance over SBW with FRAM family, because there is no flashing, just fast write/read operations (irelevant timing). Only problem related to separate power domain is that SBW data line is bidirectional. So For 3 targets there will be 6 lines in total. Of course, software is more complicated (related to BSL), but it is covered by open source slau320 and msp debug stack (https://www.ti.com/tool/MSPDS) 

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