MSPM0G3507: ADC Spurs

Hi Greg, these peaks you are seeing can be caused by several things based on what I see above.

1. High-Speed Clock Coupling & Digital Switching: Your 80MHz CPU clock and 40MHz ADC clock are large, high-frequency signals. Digital noise from the bus traces can easily couple into the analog signal lines (like the ADC pin trace or reference). At 1MSPS, any periodic digital toggling or clock harmonic that falls on an exact multiple of your sampling rate (or its sub-harmonics) will show up as a stationary or shifting spur.
2. DMA & Bus Contention: Triggering the DMA on every single sample generates intensive bus activity (AHB/APB) at 1MSPS. This rapid-fire data movement forces the CPU and DMA controller to constantly draw high peak currents, so these fast current spikes travel through the ground plane and analog supply, modulating the ADC reference or the input signal, creating frequency spurs
3.  Insufficient SCOMP for 1MSPS: you have set an SCOMP of 1, which provides a very short sampling window. When the ADC needs to acquire a signal, an internal switch closes to charge the sample-and-hold capacitor through the source impedance. If the source impedance is too high (e.g., direct sensor output without an op-amp buffer), the capacitor cannot fully settle within one clock cycle.  The incomplete settling causes non-linearities and distortion. On a DC signal, this can manifest as harmonic spurs or localized offset errors.

Can you try to increase your SCOMP setting (e.g., to 16 or 32 clock cycles) to ensure your analog front-end has ample time to charge the ADC's internal capacitor and see if you see this issue still?

-Brian

Hi Brian,

Thank you for the response it helped a lot.  The DMA recommendation lead us down the right path.  It turns out is was being caused by our main loop which just continuously loops and does some background tasks.  Adjusting the DMA allowed us to narrow in on this even though it wasn't the actual cause.  Thanks for the help.