MSP430FR2433: Issue related to LM4 Mode

Part Number: MSP430FR2433
Other Parts Discussed in Thread: MSP-EXP430FR2433,

We observed an issue related to LM4 mode current consumption on the MSP430 device.

According to the datasheet, the expected current consumption in LM4 mode is approximately 1.5 µA. However, in our setup, the measured current consumption is around 0.114mA using Energy Trace.

Current observations:

  • Device enters LM4 mode successfully

  • UART and interrupt configurations are enabled in the application

  • Measured current is stable around 114 µA using Energy Trace

  • Measurement performed on MSP-EXP430FR2433 Development board

Any guidance or reference low-power examples would be helpful.

  • If a module requires SMCLK then the clock request system will keep that clock running even in when LPM4 is set. Resulting in higher operating current. Well covered in the guide.

  • Hi Keshavamurthy,

    As David mentioned above. Please refer to this user's guide.MSP430FR4xx and MSP430FR2xx family user's guide (Rev. I) 

    Best regards,

    Bill

  • We are using the MSP430FR2433 LaunchPad and measuring the target current using the Energy Trace.

    As per the MSP430FR2433 datasheet, the typical current consumption in LPM4 is around 0.65 µA. However, in our application we are measuring approximately 56–66 µA.

    Our application has the following configuration:

    • UART (eUSCI_A0) configured using SMCLK.
    • Three GPIOs configured as inputs with pull-up resistors.
    • 3 GPIO interrupts enabled on the falling edge.
    • The MCU enters LPM4 after initialization.
    • On a GPIO interrupt, the MCU wakes up, transmits a status message over UART, and returns to LPM4.

    We are measuring the current in Energy Trace.

    Could you please advise:

    1. Is 56–66 µA expected with this configuration?
    2. Does keeping the UART configured from SMCLK prevent the device from achieving the datasheet LPM4 current?

    Any recommendations or best practices for achieving the lowest possible current in this use case would be greatly appreciated.

    Thank you.

  • The UART will keep SMCLK, and whatever sources it, running while it is busy. When it isn't busy, the clock will shut off.

    Another thing to check is the recommended configuration for unused pins.

  • Thank you for your response. I understand that the UART automatically requests SMCLK only while it is actively transmitting or receiving, and I will also review the recommended configuration for the unused GPIO pins.

    My application is battery-powered and uses the MSP430FR2433 configured as an eUSCI_B SPI slave. The SPI clock is provided externally by the master, and my goal is to achieve the lowest possible power consumption.

    I have a few questions:

    1. Can the eUSCI_B SPI slave receive interrupt (UCRXIFG) wake the MSP430FR2433 from LPM4?
    2. Since the SPI clock is supplied externally by the SPI master, does the eUSCI_B module still require SMCLK to be running while operating in SPI slave mode?
    3. If SPI slave operation is not supported in LPM4, which low-power mode is recommended for reliable SPI slave communication while maintaining the lowest possible current consumption?

    I found a TI E2E discussion stating that an SPI slave can receive data in a low-power mode because the SPI clock is provided externally. However, I would like to confirm whether this behavior also applies specifically to the MSP430FR2433 (eUSCI_B) when the device is in LPM4.

    Thank you for your guidance.

  • From the guide (23.3.7):

    "In SPI slave mode, no internal clock source is required because the clock is provided by the external
    master. It is possible to operate the eUSCI in SPI slave mode while the device is in LPM4 and all clock
    sources are disabled. The receive or transmit interrupt can wake up the CPU from any low-power mode."

  • Thank you, David.

    That clarifies my question. I appreciate you pointing me to Section 23.3.7 of the User's Guide.

    It's good to know that, in SPI slave mode, the MSP430FR2433 eUSCI_B does not require an internal clock source because the SPI clock is supplied externally by the master, and that both receive and transmit interrupts can wake the CPU from LPM4.

    Thanks again for your guidance and confirmation.

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