MSPM0G3218-Q1: Unexpected ADC MEMRESIFG interrupt delay after Timer Trigger Event

Caspar Bean

Hello TI,

I am using a timer to trigger an ADC, which has two channel config and a repeat Sequence config, my current problem is, that the time between timer EVENT Trigger and actual MEMRESIFG interrupt is much longer than expected. So far I use SCOMP0=0x30 (32MHz) for my first MEMRESIFG and the corresponding conversion time. I should have around 1.7µs but get ~9µs.

In between the Timer trigger (yellow) and Memres interrupt (red) I do nothing but wait for the ADC interrupt and set GPIO in ISR. So far I think I made the right config for ADC and timer because I had it already running fine on another MSP.

Thanks in advance

3 months ago

0 Caspar Bean 3 months ago

Prodigy 80 points

Update: I found that the PWRDN bit of the ADC is set automatically which added 5µs to my first ADC interrupt, but that still does not completely solve my problem, I suspect my Conversion is taking to long, I saw CONVCLK shall be 80MHz but it actually is something around 8MHz from my calculations. Is there any possibility to access this CONVCLK

0 Pengfei Xie 3 months ago

TI__Genius 13965 points

Hi Caspar,

Could you also test with a single channel conversion?

Caspar Bean said:
I had it already running fine on another MSP.

And did you mean the ADC sampling+conversion time is as expected in another MSPM0 device? Could you test me the part number of the "another MSP"?

0 Caspar Bean 3 months ago in reply to Pengfei Xie

Prodigy 80 points

Hello Pengfei,

I don't want to use single channel conversion, I want a repeat sequence conversion, but I tested it with the single channel conversion, it is the same long conversion behavior. As I asked before, is it possible that I made a wrong config for the CONVCLK or is it not accessible? Because Sampling time seems fine, only the CONVCLK is somehow not at right frequency.

0 Caspar Bean 3 months ago in reply to Pengfei Xie

Prodigy 80 points

The other MSPM0 was 3507

+1 Pengfei Xie 2 months ago in reply to Caspar Bean

TI__Genius 13965 points

Hi Caspar,

From the MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual (Rev. E), ADC CONVCLK is sourced from an 80MHz oscillator, so I think the abnormal sampling/conversion time is not caused by CONVVLK. Could you let me know how you measure your sampling time and think it is fine, and how did you get the 8MHz estimate result for CONVCLK?

**Attention** This is a public forum

MSP low-power microcontrollers

MSP low-power microcontroller forum

MSPM0G3218-Q1: Unexpected ADC MEMRESIFG interrupt delay after Timer Trigger Event