MSP430FR6047: USSXT oscillator unstable

Part Number: MSP430FR6047

We are developing a custom board for the MSP430FR6047.  The code is based on the FR6047_USSSWLib_template_example, with minor changes to move the uart.

The configuration parameters were generated with the USS Design Center, and we were able to run the template example with them successfuly on the EVM.

On the custom HW, we can see all of the clocks on the scope (LF, HF, and USS) and all look correct.

I am getting an error from 

    codeCapture = USS_startUltrasonicMeasurement(&gUssSWConfig, USS_capture_power_mode_active);

        codeAlg = USS_runAlgorithms(&gUssSWConfig,&algResults);

USS_message_code_USSXT_oscillator_not_stable_error = 253,
    //!< Value 253 - This error is returned when the USSXT oscillator is not
    //!< stable after start-up time
USS_message_code_algorithm_error_no_signal_detected_ups_dns_channel = 126,
    //!< Value 126 - This error is returned if no signal is detected in UP AND DOWN stream channel.
    //!< The results return by USS_runAlgorihtms or USS_runAlgorithmsFixedPoint
    //!< are invalid if this error is returned.

There is no signal generated at CH0 either.  What would make the oscillator unstable?  How can I fix it?

From USS_userConfig.h

/*******************************************************************************
 * USS FREQUENCY CONFIGURATION PARAMETERS
 *
 * USS_HSPLL_FREQ_IN_MHZ valid parameters:
 * - 80 (default), 79, 78, 77, 76, 75, 74, 73, 72, 71, 70, 69, 68
 *
 * USS_HSPLL_INPUT_CLK_TYPE valid parameters:
 * - USS_HSPLL_input_clock_type_ceramic_resonator (default)
 * - USS_HSPLL_input_clock_type_crystal
 *
 * USS_OVER_SAMPLE_RATE valid parameters:
 * -10
 * -20 (default)
 * -40
 * -80
 * -160
 *
 * USS_PLL_XTAL_IN_MHZ valid parameters:
 * -USS_HSPLL_input_clock_freq_8_MHz
 * -USS_HSPLL_input_clock_freq_4_MHz
 *
 * USS_OUTPUT_PLL_XTAL valid parameters:
 * -false (default)
 * -true
 *
 ******************************************************************************/
#define USS_HSPLL_FREQ_IN_MHZ                                              80
#define USS_HSPLL_INPUT_CLK_TYPE                                           USS_HSPLL_input_clock_type_ceramic_resonator
#define USS_SDHS_OVER_SAMPLE_RATE                                          10
#define USS_PLL_XTAL_IN_MHZ                                                USS_HSPLL_input_clock_freq_8_MHz
#define USS_OUTPUT_PLL_XTAL                                                false
#define USS_HSPLL_TOLERANCE_PERCENT                                        0.5

From the board schematic:

Thanks