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SPI master-slave problem

Other Parts Discussed in Thread: MSP430FR5739, MSP430G2553

Hi all,

I'm trying to get the g2553 to talk to the FRAM fr5739 board via SPI -- the FRAM is supposed to light up whatever bit pattern it receives.

Here is my code:

Master:


#include <inttypes.h>
#include "msp430g2553.h"
#include "legacymsp430.h"

//******************************************************************************
// MSP430G2xx3 Demo - USCI_B0 I2C Master TX multiple bytes to MSP430 Slave
//******************************************************************************

unsigned char *PTxData; // Pointer to TX data
unsigned char TXByteCtr;
unsigned char TxData[] = {0x00,0x38,0x39,0x14,0x78,0x5E,0x6D,0x0C,0x01,0x06};
unsigned char TxData2[] = {0x40,'H','e','l','l','o',' ','W', 'o', 'r', 'l', 'd','!'};

void __long_delay(unsigned int times) {
unsigned int count;
for (count = 0; count < times; count++) {
__delay_cycles(60000);
}
}

void spi_putc(char c) {
while (!(UC0IFG&UCB0TXIFG));
UCB0TXBUF = c;
}

void spi_puts(char* s, unsigned int len) {
P1OUT |= BIT0;

unsigned int i;
for (i = 0; i < len; i ++) {
spi_putc(s[i]);
__long_delay(6);
P1OUT ^= BIT0;
}
  __long_delay(10);
P1OUT &= ~BIT0;
}

void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT

P1DIR |= BIT0;
P1OUT = 0x00; // P1 setup for LED & reset output

P1SEL = BIT5 + BIT6 + BIT7;
P1SEL2 = BIT5 + BIT6 + BIT7;

//Set for transmit: master 3-Pin SPI, 8-bit LSB first, synchronous, CPHA=1 (~CKPH), CPOL=1.
UCB0CTL1 |= UCSWRST;
UCB0CTL0 |= UCCKPL + UCMST + UCMSB + UCSYNC + UCMODE_0; // 3-pin, 8-bit SPI master
UCB0CTL1 |= UCSSEL_2; // SMCLK
UCB0BR0 = 0x02; // SMCLK / k
UCB0BR1 = 0;
UCB0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
//UCB0MCTL = 0;
//IE2 |= UCB0RXIE; // Enable USCI0 RX interrupt
__long_delay(10);

spi_puts(TxData, sizeof(TxData));

spi_puts(TxData2, sizeof(TxData2));
__bis_SR_register(CPUOFF + GIE); // Enter LPM0 w/ interrupts
// Remain in LPM0 until all data
// is TX'd
}

interrupt(USCIAB0TX_VECTOR) spi_isr(void) {

}

And here is the slave code:

#include <inttypes.h>
#include "msp430fr5739.h"
#include "legacymsp430.h"

//******************************************************************************
// MSP430F54x Demo - USCI_A0, SPI 3-Wire Slave Data Echo
//
// Description: SPI slave talks to SPI master using 3-wire mode. Data received
// from master is echoed back.
//******************************************************************************

int main(void) {
WDTCTL = WDTPW + WDTHOLD;
PJDIR |= (BIT0 + BIT1 + BIT2 + BIT3);
P3DIR |= BIT6+BIT7+BIT5+BIT4;

PJOUT &= ~(BIT0 + BIT1 + BIT2 + BIT3);
PJOUT |= BIT0;
P3OUT &= ~(BIT6+BIT7+BIT5+BIT4);


// Configure XT1
PJSEL0 |= BIT4+BIT5;

CSCTL0_H = 0xA5;
CSCTL1 |= DCOFSEL0 + DCOFSEL1; // Set max. DCO setting
CSCTL2 = SELA_0 + SELS_3 + SELM_3; // set ACLK = XT1; MCLK = DCO
CSCTL3 = DIVA_0 + DIVS_3 + DIVM_3; // set all dividers
CSCTL4 |= XT1DRIVE_0;
CSCTL4 &= ~XT1OFF;
do {
CSCTL5 &= ~XT1OFFG;
// Clear XT1 fault flag
SFRIFG1 &= ~OFIFG;
} while (SFRIFG1&OFIFG); // Test oscillator fault flag

// Configure SPI pins
P1SEL1 |= BIT5;
P2SEL1 |= BIT0 + BIT1;


UCA0CTLW0 |= UCSWRST; // **Put state machine in reset**
UCA0CTLW0 |= UCSYNC+UCCKPL+UCMSB; // 3-pin, 8-bit SPI slave
// Clock polarity high, MSB
UCA0CTLW0 |= UCSSEL_2; // ACLK
UCA0BR0 = 0x02; // /2
UCA0BR1 = 0; //
UCA0MCTLW = 0; // No modulation
UCA0CTLW0 &= ~UCSWRST; // **Initialize USCI state machine**
UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt

__bis_SR_register(LPM0_bits + GIE); // Enter LPM0, enable interrupts

return 0;
}

interrupt(USCI_A0_VECTOR) spi_isr(void) {
unsigned char rx_data = UCA0RXBUF;
PJOUT = rx_data & 0b1111;
P3OUT = rx_data & 0b11110000;
while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
UCA0TXBUF = UCA0RXBUF; // Echo received data
}

I connected pin 1.5 of the G2553 (UCB0CLK) to pin 1.5 of the FRAM (UCA0CLK), pin 1.6 of the G2553 (UCB0SIMO) to pin 2.0 of the FRAM (UCA0SOMI), pin 1.7 of the G2553 (UCB0SOMI) to pin 2.1 of the FRAM (UCA0SIMO), and GND, but that doesn't work... The FRAM seems receiving nothing.

Anyone can help me figuring out what was wrong here?

  • Huan Truong said:

    I connected pin 1.5 of the G2553 (UCB0CLK) to pin 1.5 of the FRAM (UCA0CLK), pin 1.6 of the G2553 (UCB0SIMO) to pin 2.0 of the FRAM (UCA0SOMI), pin 1.7 of the G2553 (UCB0SOMI) to pin 2.1 of the FRAM (UCA0SIMO), and GND, but that doesn't work... The FRAM seems receiving nothing.

    Try connecting in the following way.

    MSP430G2553                       MSP430FR5739
    UCB0CLK (pin1.5)                 UCA0CLK (pin1.5)
    UCB0SIMO (pin1.7)               UCA0SIMO (pin2.0)
    UCB0SOMI (pin1.6)               UCA0SOMI (pin2.1)

  • Brandon is right. SIMO means Slave In Master Out. So if the USCI is master, it is the output from teh master, if the USCI is slave, it is the input to the slave. This way, all peers may switch the role (e.g. play multi-master) without need to change the physical wiring.

    On devices with teh simpler USI module, this is different, here the output is always the output, no matter what the role is.

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