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MSP430F248trgc ADC readings Error

Other Parts Discussed in Thread: MSP430F248

Hi,

I am using MSp430F248 in my circuit and the problem is 12-bit ADC readings are little off approximately by 10 to 15 counts. It is two plane board with Digital ground and Analog ground tied together. So basically there is only one ground. I added 10uf 6V caps to pin 1 and pin64 i.e DVCC and AVCC as mentioned in user guide document. I calculate the counts that I should expect by measuring the scaled down voltage that is being input to the ADC pins and using the formula given in datasheet i.e Vadc = Vin * 4095 /vref+. I am using internal Vref+ -2.5V and Vref- = 0V. Can someone please give me some idea what could be the reason for it. I am really having tough time with this.

Ali.

  • TYPO : Vref+ is 2.5V not -2.5V

  • Have you applied the calibration data as per section 24.2.2 TAG_ADC12_1 Calibration TLV Structure of the MSP430x2xx Family User's Guide?

  • All the calibration has been done in the software. I asked the software team and they think so too. do you think it is grounding issue? if you do then what should I do to take care of it. Thanks for your help.

  • Ali Tatari said:
    All the calibration has been done in the software.

    If so, you shouldn't see any offset.

    10-15 counts are 6 to 9 mV offset voltage, if the reading is off equally for the full input range.

    However, if you properly calibrated the MSP in software, there should be neither offset nor gain error.

    We use the 1611 (has no calibration data) with a preceding ~ 4:1 OpAmp divider. For calibration, I apply 2.50V and 7.50V. The software expects something around 0x400 and 0xc00 (in a quite large window) to be stable for a certain time, then takes an averaged snapshot (to eliminate noise) and calculates offset and gain from these two values.
    The reference is decoupled with external capacitors (10.1µF) and the AVCC pin is decoupled from DVCC with a series resistor and a capacitor. The measured values are correct by < 4 counts, partly noise, partly caused by temperature drift.

    However, in a more complex case, we routed separate analog ground and digital ground. The two are joined near the power supply. This way, currents drawn by other parts of the circuitry on digital GND, do not rise analog GND (due to wire resistance).

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