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msp430F5510 errata

Bob White
Intellectual 660 points
Other Parts Discussed in Thread: MSP430F5510

I made the mistake of reading the errata sheet for the msp430f5510 (slaz059j.pdf).  Very scary, I think about how much time I will waste debugging by bumping into these problems.  Anyway, there was one that really bothers me.  SYS16.  It states "Use a controlled Vcc ramp to power the device."  So I have to use an op-amp to provide Vcc?  I can't believe anyone would buy this chip.  Am I wrong?

Bob White

  • 0
    Genius 3770 points

    A bypass capacitor works too, no?

    Tony

  • 0
    Guru 227245 points

    Bob White said:
    I made the mistake of reading the errata sheet for the msp430f5510 (slaz059j.pdf).  Very scary, I think about how much time I will waste debugging by bumping into these problems.

    many people made the mistake of not reading it. And wasted much time on debugging when teh debugger was the cause of their problems :)

    Bob White said:
    Anyway, there was one that really bothers me.  SYS16.  It states "Use a controlled Vcc ramp to power the device."  So I have to use an op-amp to provide Vcc?  I can't believe anyone would buy this chip.  Am I wrong?

    partly.

    The problem is that changing VCC has some latency effects with the analog circuitry that compares for brownout etc.
    At startup, if VCC rises too slow, the BOR willr elease the MSP for operation when the voltage is sufficient. But then, the sudden current draw from the MSP will cause the voltage to drop again (as it hasn't stabilized yet). So the MSP will start up with unsufficient voltage (the BOR circuit has a certain hysteresis).

    However, if the device has already started, a fast rise in VCC will cause an irritation because comparison reference and copare voltage rise at different speeds/with delay, so the VCC 'appears' to drop in relation to the refrence. And trigger a BOR.
    Well, this situation is rathe runimportant at power-up, since who cares whether the device is reset once or twice, as long as the secodn reset happens before any vital user code is executed and interrupted.

    SYS16 mostly takes place in situation where a programmed voltage source is used. So e.g. if the firmware detects that some action needs to be performed, the power supply is reprogrammed to provide a higher voltage or a higher current. in this case, if VCC rises to quickly, the device will reset by an erroneous BOR detect.
    On the very most applicaitons, VCC is applied on startup and remains constant. And SYS16 is not an issue.

  • 0 in reply to Jens-Michael Gross
    Intellectual 660 points

    For the sake of completeness, I thought I'd mention that the errata sheet said to keep the supply dv/dt > 1V/100uS above the Brown Out Threshold (1.3V), and a development board schematic (slaa476a.pdf) shows 20 Ohms in series with 10.1 uF on AVcc, DVcc1, and Dvcc2.  Six parts!

  • 0 in reply to Bob White
    Guru 227245 points

    The 10.1µ/20Ohms is not because of this erratum. It is to decouple the AVCC from DVCC, so any digitally produced ripple won't affect the analog circuitry. If you don't need highest analog performance or have a separate 'clean' supply (e.g. separate routing of AVCC and AVSS to the power supply), these aren't necessary. A separate AVSS rputing is recommended in any case, to remove voltage shifts caused by ground currents form the negative reference.

  • 0 in reply to Jens-Michael Gross
    Intellectual 660 points

    Aha, that explains why it was on the AVcc and AVss pins, it probably also explains why the 0.1 uF is in parallel, filtering instead of dv/dt control.

    I noticed that the RC does provide the dv/dt <= 1V/100 uS requirement in the errata sheet, based on:

    (Vi-Vc)/R = C dv/dt

    dv/dt = (Vi-Vc)/RC with Vi=3.3V(Vcc),Vc=1.3V(BOR) = 2/RC

    RC=20*10.1x10^-6 = 202 uS

    2/RC= 0.99 V/100 uS, which meets the <= 1V/100uS requirement at and above the BOR threshold.

    Oh yeah, and it's 9 parts!  I wonder if I can tie the three Vcc and the 3 Vss together, since they're so well decoupled, and get by with only 3 parts?

  • 0 in reply to Bob White
    Guru 227245 points

    Bob White said:
    I wonder if I can tie the three Vcc and the 3 Vss together

    Yes you can. They ar einternally connected and teh external blocking capacitance can be combined ot split across them. I'm not even sure you need to connect them all three at all. It jsu tleaves you some freedom for the layout. You might even go in on one DVCC and out of another to AVCC if you want.

    However, the capacitance on VCore is mandatory.
    And he resistor/capacitor combo on RST is recommended if you cannot ensure the minimum rise tiem of VCC (it keeps RST below VCC for soem time, so VCC has time to rise completely before the MSP starts). The pullup resistor is not required on most 5x parts except the 54xx, as ther eis an internal pullup. But a series resistor between RST and capacitor is recommended if you need larger capacitance (slower VCC) and want to use SBW protocol for programming (else the capacitor would swallow the SBW signal)

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