The entry "Use-Case: WDT+ in Watchdog Mode" includes this sample code:
// Clear WDT+ counter periodically in application firmware
WDTCTL = WDTCTL + WDTCNTCL; // Set WDT+ counter clear bit (instruction clears other bits)
This code snip attempts to MODIFY the watchdog timer control register. This doesn't work because the register is protected by a "password".
The upper byte reads as a 0x69, but must be written as 0x5A, else the watchdog will reset the cpu.
A reset of the watch should instead write the entire register, including the password byte and the entire setup for the timer, including the WDTCNTCL counter-clear bit.
If the existing settings must be modified, then the upper byte must be masked off and replaced with the password byte.
