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what is the CPU clock frequency of MSP430F5635 ?

Jenitta Rex
Intellectual 660 points

Hi

I am using MSP430 F5635 .

How do i know the CPU clock frequency ?

By intention is to create a delay for some ms .

So to use the __delay_cycles function , i want to know the CPU clock frequency .

Thanks in advance

Jenitta

  • 0
    Intellectual 660 points

    Hi

    If instead of _delay_cycles , if i have to use _nop() for creating some delay ,

    what is the time taken to execute one _nop() instruction ??

    Please reply .

    Thanks in advance.

    Jenitta

  • 0
    Expert 1610 points

    Hi Jenitta,

    the clock frequency is given by your configuration and your crystals used on your board.__delay_cycles(n) is a function that inserts code that needs n cycles of MCLK to run. So if your clock runs at 8MHz a cycles takes 125ns, 1ms delay then need 8000 cycles of delay.

    Apart from that, if you need accurate delays you should better use a timer - they are made for this :-)

  • 0 in reply to Jenitta Rex
    Expert 1610 points

    Hi again,

    the _nop() is a special assembler instruction which does No OPeration and will take one MCLK cycle. But be aware that

    volatile int i;
    for (i=0; i<8000; i++) {
      __nop();
    }

    and

    __delay_cycles(8000);

    will have *very* different delay times.

  • 0 in reply to Jan Kesten
    TI__Genius 16840 points

    An easy way to check the MSP430 clocks is just to set the GPIOs to output the corresponding clock. I.e.:

    - P3.4 can output SMCLK if P3SEL.4 =1 and P3DIR.4 = 1 (depending on your configuration SMCLK could be the same as MCLK)

    - P1.0 can output ACLK if P1SEL.0 =1 and P1DIR.0 =1

    - Any of the PortMap pins (P2[0:7]) can be configured to output MCLK. According to table 12 in the datasheet, the mnemonic is "PM_MCLK" and you can use the PMAP examples found in the code examples as a guide: http://www.ti.com/litv/zip/slac417d

    Regards,

    Luis R

  • 0
    Genius 3770 points

    Hi Jenitta,

    By default the main clock MCLK is sourced from the DCO and is trimmed by the FLL to ~1MHz using REFO as reference.

    See the UCS examples for how to adjust the clocks to your needs.

    Also as Jan alluded to, you should use __delay_cycles if you want a cycle accurate delay function.

    Tony

  • 0 in reply to TonyKao
    Intellectual 660 points

    Thank you very much !

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