Hello TI,
Should the TEST/SBWTCK pin be pulled high or low to make the MSP430F5438IPZ operate in 4-wire JTAG (IEEE 1149.1) mode?
In our system architecture, there is a JTAG mux that allows access to the JTAG pins of 15 different cards in the system backplane. The mux makes the 5 standard JTAG pins accessible on a rear panel connector. For the card containing the MSP430F5438IPZ , the TCK, TMS, TDI, TDO, and RST/NMI/SBWTDIO (in place of TRST#) pins are connected to the mux. The TEST/SBWTCK pin can be controlled by the mux, but it is not brought out to the rear panel connector. I hope this will not preclude the use of the MSP-FET430UIF tool.
Regards,
Jeff