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Understanding LPMs :)

kazola
Guru 18595 points
Other Parts Discussed in Thread: MSP430G2452

Hi Ti forum,

If my MSP is in LPM4 and receives an interruption, it switches to active mode to serve it, am I right?

How would you measure how long the MSP430 is in active mode serving the interrupt prior going back to LMP4?

Would you recommend me looking at the disassembly and counting the number of instructions?

I will be looking for your suggerences! :) Thanks a lot!

  • 0
    Guru 58965 points

    kazola said:
    ... Would you recommend me looking at the disassembly and counting the number of instructions? ...

    You also need to know how long it takes to start MCLK, what is its frequency, and how many MCLSs each of those instructions takes.

  • 0
    Genius 3770 points

    Since the MSP430 instructions has generally deterministic cycle lengths, you should be able to count the cycles by looking at the assembly source. Actually there's an upper bound to the number of cycles, which is (# instructions) * 6 < (total cycles), since the worst case instruction cycle length is 6 for the most expensive addressing modes.

    Or, you can use Timer_A to measure how long it has elapse from the first instruction to the last. This is helpful especially if you have non-deterministic loops or calls.

    BTW it takes 6 cycles from the CPU accepting the interrupt to executing the first instruction.

    Tony

  • 0 in reply to old_cow_yellow
    Genius 3770 points

    old_cow_yellow said:

    You also need to know how long it takes to start MCLK, what is its frequency, and how many MCLSs each of those instructions takes.

    This is more or less fixed if you source the MCLK from the DCO, since it'll start within 1/fmclk + t(dco lpm3,4), which is usually around ~2us for the 2xx family, and ~6us for the 5xx/6xx family.

    If you're using from XT2 or LFXT1, then it gets more complicated as it depends on the drive strength, the frequency of the crystal, load capacitance, etc etc.

    Tony

  • 0 in reply to TonyKao
    Guru 18595 points

    Wow!

    What an amount of info. That's great :) The upper side thing will be great if I'm not able to determine exactly the procedure to have the most pessimistic scenario :)

    Meanwhile, I'm using ACLK when in LPM3 and 1MHz MCLK when in active mode.

    I've already ticked the "keep the assembly" option in the project properties and will try to make my calculus. Unfortunately, I cannot use TimerA because my application is already using it :)

    Thanks for the great value info. Let me not "verify" the thread until I finish this thing just-in-case I have another small doubt. Thanks a lot you both!

  • 0 in reply to kazola
    Guru 18595 points

    Hi Kao and Cow :)

    Thanks a lot for your previous questions. I only have 3 more doubts, which will help me in my understanding to try to ask for help less often ;)

    1)  I think I'm already done with my current consumption calculus. The info you gave me was very useful. I was wondering if the "LPMx to active mode" time of about 1.5us is also true the other way around. That is, I guess I could use also this value for transitions from "active mode to LPMx". I was thinking about considering active mode consumption value in both these two transitions. What do you think about these time and consumption assumptions?

    2) Also, as I am starting with disassembly, I have a doubt regarding the following example code:

    e06c: 40B2 5A80 0120 MOV.W #0x5a80,&Watchdog_Timer_WDTCTL
     37 P1DIR = 0xFF; // All P1.x outputs
    e072: 43F2 0022 MOV.B #-1,&Port_1_2_P1DIR
     38 P1OUT = 0; // All P1.x reset

    Instruction #37 takes up to 6 bytes in memory (3 words) and #38 about 4 bytes (2 words). Am I right?

    3) Finally, since the MSP430G2452 datasheet states: 

    16-Bit RISC Architecture, 62.5-ns Instruction cycle time

    and I guess this must be for 16MHz... I can consider a (62.5ns * 16) instruction cycle time, since I'm working at 1MHz. Am I right? If we name this last value as beta... can I consider the time for executing #37 is beta*6 and for #38 beta*4?

    Thanks a lot for your time, answers and patience if I've said something stupid! :)

  • 0 in reply to kazola
    Guru 227245 points

    kazola said:
    I was wondering if the "LPMx to active mode" time of about 1.5us is also true the other way around.

    No. YOu can switch off an oscillator in an instant by cutting its power supply. But after restoring the supply, it taks some time to re-establish oscillation at the given frequency. For the initial microseconds, there might be overshooting (possibly hazardous), so the DCO is gated for some time before it is allowed to source MCLK again.
    So active mode to LPM is almost instantaneous.

    kazola said:
    Instruction #37 takes up to 6 bytes in memory (3 words) and #38 about 4 bytes (2 words). Am I right?

    No. Instruction #36 takes three words :) The code with comment MOV.B #-1 belongs to the P1DIR = 0xff (0xff is equal to -1) instruction. And the code generated for instruction #38 wasn't quoted at all.

    However, you hit a special feature of the MSP: the constant generator. The values 0, 1, 2, 4, 8 and -1 (0xff/0xffff) do not need to be stored as separate parameters (like the 0x5a80 value in the assignment to the WDT in the first line you quoted). These values can be accessed by a special combination of register and addressing mode directly in the instruction itself. Saves time and space, as these are the most-often used values (1,2,4,8 being the values of the status bits in the status register, which you check/change all the time, but the use is not limited to the status register)

  • 0 in reply to Jens-Michael Gross
    Guru 18595 points

    Thank you all three. I'm going to press "verify" like a possessed man :)

    Thanks a lot. I'm sorry for the stupid question of the #linenumber in assembly, obviously I failed the cut-copy procedure.

    What about the last question? The instruction time thing?

    And for how long have you been working with MSP430, JMG?

  • 0 in reply to kazola
    Guru 227245 points

    kazola said:
    obviously I failed the cut-copy procedure.

    Happens sometimes. You'd be surprised how many copy/paste errors have been corrected in the TI documentation over the last years :) (I kept copies of the older versions of all datasheets I ever downloaded - there ar emany, and still are)
    So you're not alone :)

    kazola said:
    for how long have you been working with MSP430, JMG?

    I just took a look into my code library. The oldest dated header entry I found is exactly 6 years old now (+- a few days), but I'm sure I started a few months earlier with experimenting and migrating code from PIC and ATMega.

    kazola said:
    What about the last question? The instruction time thing?

    The 62.5ns are indeed for 16MHz MCLK, which is th emaximum on this MSP. (others work up to 25MHz, thus 40nS cycle time).
    There is no 100% relation between number of words and required cycles. However, the absolute minimum of cycles for an instruction is indeed the number of words it takes, as teh CPU can only read or write one 16 bit value per cycle from teh memory bus. But usually, there are more accesses, liek reading teh value from teh address that is part of the instruction. And maybe writing the result back to this location. Or storing data on the stack, whcih also is a memory bus access. And whenever an instruction affects the program counter, a 'dummy' cycle is required too.

    So for P1DIR=0xff, the execution time is 3 cycles: read instruction, read address (P1DIR), write 0xff from constant generator (takes no cycle as it is a register address) to P1DIR.

    You'll find the solution in Table 4-10. Source is Rn (as 0xff can be fetched form the constant generator, which is equivaltent to register mode), target is &P1DIR (the '&' indicates that the address is absolute, not relative to current PC), and it is a move instruction. So it takes 3 cycles (see footnote).
    P1DIR ^= 0xff would take 4 cycles, as it requires reading P1DIR first, before it can be EORd and written.

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