Hi
I use TI evaluation board MS-TS430DA38 with 32768Hz crystal and MSP430F2272.
I send bytes using SPI master 3 wire mode on UCB0 betweenh bytes I wait for UCB0TXIFG set before after sending each byte. The user guide says that this flag will be set when UCB0TXBUF is ready for next byte and not at the end of transfer what I see on the scope that this flag is actually set at end of transfer and not immediately when UCB0TXBUF is empty.
My application is critically time depended and it is very important for me to solve this issue or to know if it is a bug.
Attached is my test code and an image of the scope:
/***************************************************************/
#include <msp430x22x4.h>
int InitClocks()
{
int Cnt = 8;
DCOCTL = CALDCO_1MHZ; //DCO
BCSCTL1 = CALBC1_1MHZ | XT2OFF | DIVA_0; //X2 off, LFXT1 High Freq,
BCSCTL3 = LFXT1S_0; // LFXT1 is 32768Hz
do
{
IFG1 &= ~OFIFG;
for (int j = 0 ; j < 200 ; j++) //Delay
{
}
if (++Cnt > 200) //If 200 consecutive faults return FALSE to indicate oscilator fault.
{
return 0;
}
} while((IFG1 & OFIFG) != 0);
BCSCTL2 = SELM_0 | DIVM_0 | DIVS_0;
return 1;
}
void InitSPI()
{
P3SEL = 0x0E;
UCB0CTL1 = UCSWRST; // SPI must be in reset state during initialization.
UCB0CTL0 = UCMSB | UCMST | UCSYNC; // SPI 8 bit slave 4 lines
UCB0CTL1 = UCSSEL_2; //Use SMCLK and Release from reset.
}
void main()
{
if(InitClocks())
{
InitSPI();
P4DIR = 0x80;
while(1)
{
UCB0TXBUF = 0xAA;
while((IFG2 & UCB0TXIFG) == 0);
P4OUT = 0x80;
UCB0TXBUF = 0xAA;
while((IFG2 & UCB0TXIFG) == 0);
P4OUT = 0;
}
}
}
********************************************************************/
