hello,
My job to communicate between MSP430F1481 & AT45DB3210D.
spi_init()
{
P5DIR |=0x0C; // P5.1,2,3 SPI option select
P4DIR |=0x08;
P4OUT |=0x00;
UCTL1 |= CHAR; // 8-bit character
UCTL1 |= SYNC;
UTCTL1 |= SSEL0; // UCLK = ACLK
UBR01 = 0x03; // 8MHz 9600
UBR11 = 0x00; // 8MHz 9600
UMCTL1 = 0x00;
UCTL1 &= ~SWRST;
/////////////////////or//////////////////
UCTL1 |= CHAR; // 8-bit character
UCTL1 |= SYNC;
UTCTL1 |= SSEL1; // UCLK = EXT CLK 8MHz. crystal
UBR01 = 0x41; // 8MHz 9600
UBR11 = 0x03; // 8MHz 9600
UMCTL1 = 0x00;
UCTL1 &= ~SWRST;
}
i put this code for SPI communication...
but unfortunatelt i donot match any cloack generation. 1. ACLK, 2. External master clock.
in clk pin, i get always high status.
regards
rishi