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Interfacing BQ77pl900 with MSP430f2410

Other Parts Discussed in Thread: BQ77PL900, MSP430F2410

I need to setup an I2C interface between BQ77pl900 (an AFE) and MSP430F2410 microcontroller

At the moment, with some modifications I'm using the sample code provided by TI, but nothing works out.

Intentions are, the MSP controller must control the AFE in host control mode and successfully write/read into it.

The code im trying to run on MSP,

----------------------------------------------------------------------

#include "msp430x24x.h"

unsigned char *PTxData;                     // Pointer to TX data
unsigned char TXByteCtr;

const unsigned char Tx_StCtrlReg[] =              // Table of data to transmit
{
  0x20,     // Slave address + write bit set to 0
  0x02,
  0x02
};

const unsigned char Tx_OutCtrlReg[] =
{
  0x20,     // Slave address + write bit set to 0
  0x01,   // Output Control Register address
  0x00    // All Off, turns off DSG_FET
};

void main(void)
{

  WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT

  P3SEL |= 0x06;                            // Assign I2C pins to USCI_B0
  UCB0CTL1 |= UCSWRST;                      // Enable SW reset
  UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC;     // I2C Master, synchronous mode
  UCB0CTL1 = UCSSEL_2 + UCSWRST;            // Use SMCLK, keep SW reset
  UCB0BR0 = 12;                             // fSCL = SMCLK/12 = ~100kHz
  UCB0BR1 = 0;
  UCB0I2CSA = 0x20;                         // Slave Address is 020h
  UCB0CTL1 &= ~UCSWRST;                     // Clear SW reset, resume operation
  IE2 |= UCB0TXIE;                          // Enable TX interrupt

  while (1)
  {
    UCB0CTL1 |= UCTR + UCTXSTT;             // I2C TX, start condition

    PTxData = (unsigned char *)Tx_StCtrlReg;      // TX array start address
    TXByteCtr = sizeof(Tx_StCtrlReg);              // Load TX byte counter
    while (UCB0CTL1 & UCTXSTP);             // Ensure stop condition got sent

    UCB0CTL1 |= UCTR + UCTXSTT;             // I2C TX, start condition


    PTxData = (unsigned char *)Tx_OutCtrlReg;      // TX array start address
    TXByteCtr = sizeof(Tx_OutCtrlReg);              // Load TX byte counter
    while (UCB0CTL1 & UCTXSTP);             // Ensure stop condition got sent

    UCB0CTL1 |= UCTR + UCTXSTT;             // I2C TX, start condition
   
    __bis_SR_register(CPUOFF + GIE);        // Enter LPM0 w/ interrupts
                                            // Remain in LPM0 until all data
                                            // is TX'd
 
  }
}

//------------------------------------------------------------------------------
// The USCIAB0TX_ISR is structured such that it can be used to transmit any
// number of bytes by pre-loading TXByteCtr with the byte count. Also, TXData
// points to the next byte to transmit.
//------------------------------------------------------------------------------
#pragma vector = USCIAB0TX_VECTOR
__interrupt void USCIAB0TX_ISR(void)
{
  if (TXByteCtr)                            // Check TX byte counter
  {
    UCB0TXBUF = *PTxData++;                 // Load TX buffer
    TXByteCtr--;                            // Decrement TX byte counter
  }
  else
  {
    UCB0CTL1 |= UCTXSTP;                    // I2C stop condition
    IFG2 &= ~UCB0TXIFG;                     // Clear USCI_B0 TX int flag
    __bic_SR_register_on_exit(CPUOFF);      // Exit LPM0
  }
}

-------------------

 

Please help me to fix this problem.

  • Hello,

    I see that you are trying to transmit TX_OutCtrlReg.

    Now the BQ slave address has been loaded to UCB0I2CSA and will be automatically transmitted out with a start condition.

    Why is this address being loaded again in the Tx_OutCtrlReg array?

    This will send the slave address out twice making your transaction looks as follows:

    start - 0x20 - 0x20 - 0x02 - 0x02 - stop

    Is this the intent?

    Regards,

    Priya

  • good to see your reply. Thanks

    you are right. In fact  I was trying different configuration to let the things work. Mean while i figured out that as soon i issue the following command

    UCB0CTL1    |= UCTR + UCTXSTT;

    the SCL line goes high to low. Do you have any answer for that ?

     

  • Hello,

    When the UCTXSTT bit is set - it indicates that the module is to send out an I2C start condition.

    The I2C start condition - is sent by pulling the data line low followed by the clock (SCL) line.

    Is this what you see in your setup?

    -Priya

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