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MSP430F249 I/O timings

Other Parts Discussed in Thread: MSP430F249

Hello,

I'm using a MSP430F249 with a 16MHz quartz on XT2.

For test Im running this sample program :

#include "msp430x24x.h"

volatile unsigned int i;

void main(void)
{
      WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT

      P5DIR |= 0x10;                            // P5.4= output direction
      P5SEL |= 0x10;                            // P5.4= MCLK option select
      P3DIR |= BIT2;                            // P3.2 = output direction

    BCSCTL1 &= ~XT2OFF;
    BCSCTL3 |= XT2S_2; // Select 3-16MHz crystal range

    // Starts at 1MHz with internal oscillator
    // Wait 50 ms the external oscillator start
    // 1 us by tick
    while (i < 50000)
    {
        __no_operation();
        i++;
    }
   
    // Then configure to external
    BCSCTL2 |= SELS + SELM_2; // Select XT2CLK
       
  for (;;)                                  // Infinite loop
  {
    P3OUT |= BIT2;                          // P3.2 = 1
    P3OUT &= ~BIT2;                         // P3.2 = 0
    P3OUT |= BIT2;                          // P3.2 = 1
    P3OUT &= ~BIT2;                         // P3.2 = 0
    P3OUT |= BIT2;                          // P3.2 = 1
    P3OUT &= ~BIT2;                         // P3.2 = 0
  }

Ive 3.6µs between each edges. This seems to me slow ...

What do you think ?

  • DCON,

    the reason that it doesn't work is probably that the required crystal startup flow isn't used. Basically, there is a certain code sequence that needs to get executed, otherwise the XT2 fault detection circuitry will prevent the CPU running from off XT2. The MSP430F2xx Family User's Guide (http://www.ti.com/lit/pdf/slau144) has the details on this. If you are looking for sample code, please have a look at the file "msp430x24x_OF_XT2.c" from MSP430F249 code example archive (http://www.ti.com/lit/zip/slac149) that can be found in the device product folder.

    Regards,
    Andreas

  • I had run this code before but the execution never leaves this loop :

          do
          {
          IFG1 &= ~OFIFG;                           // Clear OSCFault flag
          for (i = 0xFFFF; i > 0; i--);             // Time for flag to set
          }
          while ((IFG1 & OFIFG));                   // OSCFault flag still set?

    I found that OFIFG is set by LFXT1OF and not by XT2OF but i dont use it.

    I disabled it by doing _bis_SR_register(OSCOFF);

    There is no more LFXT1OFfault but as I never seen it in all the samples i dont know if its right to do this.

    Thanks very much.

  • Hi DCON,

    your observation is correct. In order for the oscillator fault detection circuitry to not prevent you from switching MCLK over to XT2, you need to set OSCOFF to disable LFXT1 or switch ACLK over to be sourced by the internal VLO. Some of our code examples somewhat assume that there is a 32-kHz crystal connected to LFXT1 and don't clearly document this. Since this is a somewhat rare use case I guess this issue hasn't surfaced much. Anyways I'll work with the folks to get our code examples updated regarding this to have the __bis_SR_register(OSCOFF) line added.

    Regards,
    Andreas

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